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Juan Antonio Fuster Verdú25/09/2006, 14:00
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Antonio FERRER25/09/2006, 14:30
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Mike LAMONT25/09/2006, 15:15The status of the ongoing LHC installation is described with attention given to the long straight sections around the experiments. An overview of the proposed commissioning schedule for 2007 and 2008 presented. This schedule includes a calibration run at the end of 2007 which aims to deliver collisions at 450 GeV beam energy. The details of this run and planned beam conditions are...Go to contribution page
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Ernesto PEREA25/09/2006, 16:30The seminar addresses recent advances in CMOS technologies. Technological limits, device-related limits and fundamental physical limits linked to the diminished feature sizes and their impact on analog performance and digital integration potential are discussed. Progress is made in new semiconductor/dielectric materials and in band-gap engineering to overcome some of the...Go to contribution page
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Vyshnavi SUNTHARALINGAM25/09/2006, 17:15Traditional integrated circuits consist of a single layer of transistors interconnected with multiple layers of metal wiring. Three-dimensional integrated circuits (3D-ICs) consist of two or more active circuit layers that are vertically stacked and interconnected at high density. In addition to reducing the wire length, 3-D interconnection of active devices offers the potential...Go to contribution page
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Tim Greenshaw (Liverpool)26/09/2006, 09:00The challenges of experimentation at the International Linear Collider are discussed and the different detector concepts designed to cope with those challenges presented. The differing concepts lead to various alternative technologies for the major ILC detector components. These are briefly presented and discussed.Go to contribution page
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RAY LARSEN (Stanford Linear Accelerator Center For the ILC High Availability Electronics R&D Effort)26/09/2006, 09:45Availability modeling of the proposed International Linear Collider predicts unacceptably low uptime with current electronics systems designs. High Availability (HA) analysis is being used as a guideline for all major machine systems including sources, utilities, cryogenics, magnets, power supplies, instrumentation and controls. R&D teams are seeking to achieve total machine high...Go to contribution page
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Pamela Klabbers (University of Wisconsin)26/09/2006, 10:55The electronics for the Regional Calorimeter Trigger (RCT) of the Compact Muon Solenoid Experiment (CMS) have been produced and tested. The RCT hardware consists of 18 double-sided crates containing custom boards, ASICs, and backplanes. The RCT receives 8 bit energies and a data quality bit from the HCAL and ECAL Trigger Primitive Generators (TPGs) and sends it to the CMS...Go to contribution page
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Vincent Bobillier (CERN)26/09/2006, 10:55The infrastructure for the electronics, such as cabling, mains power distribution, low and high voltage power supplies, detector safety system, grounding and its installation in the LHCb experimental cavern will be presented. In particular, choices and compromises that have been made for power distribution, racks, cables and cable ducts installation, grounding (EMC) and optical fiber link...Go to contribution page
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Matt Stettler (CERN)26/09/2006, 11:20An alternative design for the CMS Global Calorimeter Trigger (GCT) is being implemented. The new design adheres to all the CMS specifications regarding interfaces and functional requirements of the trigger systems. The design is modular, compact, and utilizes proven components. Functionality has been partitioned to allow commissioning in stages corresponding to the different...Go to contribution page
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Jorgen Christiansen (CERN)26/09/2006, 11:20An overview of testing, time alignment, calibration and monitoring features in the front-end electronics of LHCb is given. General features for this are defined and examples are given of how this has been implemented in sub-detector specific front- end electronics.Go to contribution page
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Jorge Fernandez De Troconiz (Universidad Autonoma de Madrid)26/09/2006, 11:45The Compact Muon Solenoid (CMS) is a general purpose experiment designed to study proton-proton collisions at the Large Hadron Collider (LHC). At the LHC, proton beams will cross each other at a rate of 40 MHz, producing in average 20 p-p interactions. The CMS L1 Trigger must select interesting collisions at a rate smaller than 100 kHz. The Drift Tube Track Finder (DTTF) implements the...Go to contribution page
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Dirk Wiedner (Physikalisches Institut Uni Heidelberg)26/09/2006, 11:45The LHCb Outer Tracker is composed of 55000 straw drift tubes. The requirements for the OT electronics is the precise (1ns) drift time measurement at 6% occupancy and 1MHz readout. Charge signals form the straw detector are amplified, shaped and discriminated by ATLAS ASDBLR chips. Drift-times are determined and stored in the OTIS TDC and output to a GOL serializer at L0...Go to contribution page
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Flavio Loddo (INFN Bari)26/09/2006, 12:10In the CMS experiment, sub-detectors may send special trigger signals, called “Technical Triggers”, for special purposes like test and calibration during the off-beam periods. The Resistive Plate Chambers are part of the Muon Trigger System of the experiment, but might also be used to produce a cosmic muon trigger as Technical Trigger to be used during the Cosmic Challenge and the later...Go to contribution page
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David Gascon (D. ECM, Universitat de Barcelona)26/09/2006, 12:10In this paper the Front End electronics of the Scintillator Pad Detector (SPD) is outlined. The SPD is a sub-system of the Calorimeter of the LHCb experiment designed to discriminate between charged particles and neutrals for the first level trigger. The complete system design is presented, describing its different functionalities implemented through three different cards and two ASICs....Go to contribution page
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Luigi Guiducci (Istituto Nazionale di Fisica Nucleare (INFN))26/09/2006, 12:35Drift Tubes chambers are used in the CMS barrel for tagging the passage of high Pt muons generated in a LHC event and for triggering the CMS data read out. The Sector Collector system synchronizes the track segments built by trigger modules on the chambers and deliver them to reconstruction processors (Track Finder, TF) that assemble full muon tracks. Then, the Muon Sorter has to...Go to contribution page
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Rafael Antunes Nobrega (INFN - Sez. Roma)26/09/2006, 12:35The document to be presented will describe the electronic scheme and procedures of a system implemented to test the Multi-Wired Proportional Chambers after front-end dressing for the LHCb Muon Detector and its results. Given a dressed chamber, this system is able to diagnose every channel based on front-end output drivers’ response and noise rate versus threshold analysis, in...Go to contribution page
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Magnus Hansen (CERN)26/09/2006, 14:15The electronics systems used to control, trigger, and acquire data from the four experiments at LHC are, for the field of High Energy Physics, of unprecedented level of complexity and sophistication. In the case of CMS, users are gaining access to the counting room (USC55) at a late stage with respect to the official LHC start-up date. Measures taken to reduce the time required between...Go to contribution page
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Julien Laubser (Laboratoire de physique Corpusculaire (LPC) de Clermont-Ferrand)26/09/2006, 14:15The Level-0 Decision Unit (L0DU) is the central part of the first trigger level of the LHCb detector. The L0DU receives information from the Calorimeter, Muon and Pile- Up sub-triggers at 40 MHz via 24 high speed optical fiber links running at 1.6 Gb/s. The L0DU performs simple physical algorithm to compute the decision in order to reduce the data flow down to 1 MHz for the next trigger...Go to contribution page
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Cristina Biino (INFN - sezione di Torino)26/09/2006, 14:40The CMS electromagnetic calorimeter is composed of 76,000 PbWO_4 scintillating crystals. The scintillating light is captured by photo-detectors, amplified and digitized. The conversion is performed inside the detector volume and data are transported through optical fibers to the off-detector electronics. About 25,000 Printed Circuit Boards of 5 different types and...Go to contribution page
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Jean-Pierre Cachemiche (CPPM IN2P3/CNRS)26/09/2006, 14:40The Level-0 muon trigger looks for straight tracks crossing the five muon stations of the muon detector and measures their transverse momentum. The tracking uses a road algorithm relying on the projectivity of the muon detector. The Level-0 muon trigger analyzes every LHC bunch crossing. It handles about 130 GBytes per second. It finds muon tracks for a bunch crossing in about one...Go to contribution page
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Cyril Drancourt (Laboratoire d'Annecy-le-Vieux de Physique des Particules (LAPP))26/09/2006, 15:05The Validation board participates in the electronic for triggering system of LHCb calorimeter detector. The board, designed in Annecy-le-vieux Laboratory (LAPP-France), has logic radiation tolerant components: programmable logic, LVDS deserializer, 1.6Gbits optic transmitter. The inputs come from Front-end board of 4 different detectors (Electromagnetic, Hadronic, PreShower,...Go to contribution page
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Alessandro Nardulli (Eidgenössische Technische Hochschule, ETH, Zurich, Switzerland)26/09/2006, 15:05We report the results of tests of 12800 Very Front End (VFE) readout cards for the barrel of the CMS electromagnetic calorimeter. A thorough test sequence was applied to each card including power-on test, burn-in and final detailed calibration. The results show excellent uniformity of the VFE cards. For instance the analogue, digital and buffer currents have average values of 1.59, 0.43...Go to contribution page
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Kostas Kloukinas (CERN)26/09/2006, 15:30The FEC-CCS is a custom made 9U VME64x card for the Off-Detector electronics of the CMS detectors. Special effort has been invested in the design of the card in order to make it compatible with the operational requirements of multiple CMS sub- detectors namely the Tracker, the ECAL Crystals and ECAL Preshower, the PIXELs, the RPCs and the TOTEM. This paper describes the design...Go to contribution page
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Hiroshi Nomoto (ICEPP,Tokyo)26/09/2006, 15:30For the detector commissioning planned in 2007, a sector assembly of the ATLAS muon endcap trigger chambers is progressed in CERN intensively. Final technical test for the electronics mounted on a sector must be accomplished at this stage. For systematic test of the electronics, we have developed a DAQ system on top of the ATLAS online software framework. The system is not dedicated only...Go to contribution page
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Thilo Pauly (European Organization for Nuclear Research (CERN))26/09/2006, 16:20The ATLAS Level-1 Central Trigger consists of the Central Trigger Processor (CTP) and the Muon to Central Trigger Processor Interface (MuCTPI). The CTP receives trigger information from the Level-1 Calorimeter Trigger system directly, and from the Level-1 Muon Trigger systems through the MuCTPI. It also receives timing signals from the LHC machine, and fans out the Level-1 Accept signal,...Go to contribution page
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Jonathan Fulcher (Imperial College)26/09/2006, 16:20The CMS Silicon Tracker is comprised of a complicated set of hardware and software components that have been thoroughly tested at CERN before final integration of the Tracker. A vertical slice of the full readout chain has been operated under near-final conditions. In the absence of the tracker front-end modules, simulated events have been created within the FED and used to test the...Go to contribution page
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Vasiliki Mitsou (Instituto de Fisica Corpuscular (IFIC) UV-CSIC)26/09/2006, 16:45The SemiConductor Tracker (SCT) together with the pixel detector and the Transition Radiation Tracker (TRT) form the central tracking system of the ATLAS experiment at the LHC. It consists of single-sided microstrip silicon sensors, which are read out via binary ASICs based on the DMILL technology and the data are transmitted via optical fibres. After an overview of the SCT detector layout...Go to contribution page
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Stefan Haas (CERN)26/09/2006, 16:45The Muon to Central Trigger Processor Interface (MUCTPI) of the ATLAS Level-1 trigger receives data from the sector logic modules of the muon trigger at every bunch crossing and calculates the total multiplicity of muon candidates, which is then sent to the Central Trigger Processor (CTP) where the final Level-1 decision is taken. The MUCTPI system consists of a 9U VME crate with a special...Go to contribution page
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Trevor Vickey (Univ. of Wisconsin, Madison, Department of Physics)26/09/2006, 17:10I present an overview of a read-out driver (ROD) for silicon detectors in the ATLAS experiment at the Large Hadron Collider (LHC). Two silicon-based ATLAS tracking systems, referred to as the Pixel Detector and the Semiconductor Tracker (SCT), are controlled and read-out using a common 9U VME board. A hybrid design of Field Programmable Gate Arrays (FPGAs) and Digital Signal Processors...Go to contribution page
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Riccardo Vari (Istituto Nazionale di Fisica Nucleare (INFN))26/09/2006, 17:10The ATLAS experiment uses a system of three concentric Resistive Plate Chambers detectors layers for the level-1 muon trigger in the air-core barrel toroid region. The trigger classifies muons within different programmable transverse momentum ranges, and tags the identified tracks with the corresponding bunch crossing number. The algorithm looks for hit coincidences within different...Go to contribution page
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Yuri ERMOLINE (MSU)26/09/2006, 17:35The ATLAS High Level Trigger (HLT) uses information from the hardware based Level 1 Trigger system to guide the retrieval of information from the readout system. The Level 1 Trigger elements (jet, electromagnetic, muon candidate, etc.) determine Regions of Interest (RoIs) that seed further trigger decisions. This paper describes the device - the RoI Builder - that collects these data...Go to contribution page
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Aldo Saavedra (Glasgow)26/09/2006, 17:35LHCb is the only dedicated $B$ physics experiment on the Large Hadron Collider (LHC) ring. It is an spectrometer whose vertex detector(VeLo) has been optimise for the reconstruction of vertices near the beam. This is achieved by placing the silicon strip detector modules inside the primary beam pipe. Hence they are expected to operate in vacuum (10$^{-6}$mbar) and withstand high levels...Go to contribution page
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Samuele Antinori (Department of Physics & INFN Bologna)26/09/2006, 18:00The paper presents the design and test of the final prototype of the CARLOS end ladder board. This board is able to compress data coming from one Silicon Drift Detector (SDD) front-end electronics and to send them towards the data concentrator card CARLOSrx in counting room via a 800 MBit/s optical link. The board design faces several constraints, mainly size (54x49 mm) and radiation...Go to contribution page
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Alberto Valero (Instituto de Fisica Corpuscular (IFIC) UV-CSIC)26/09/2006, 18:00The setup used in the production of the 38 TileCal Read Out Drivers (RODs) and the results are described. Firstly we will explain all the hardware and firmware changes done to the RODs in order to adapt them to the TileCal requirements. Then, we will describe the procedure to test the RODs and the obtained results.Go to contribution page
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Marco VAN UFFELEN (SCK)27/09/2006, 09:00Periodic maintenance operations during shut down of the future International Thermonuclear Experimental Reactor (ITER) will have to be performed in a severe nuclear environment, exposing operating tools inside the reactor vessel to temperatures ranging from 50°C to 200°C, with total doses that can reach MGy levels. Radiation tolerant remote-handling technology will therefore play...Go to contribution page
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Rui de Oliveira (CERN)27/09/2006, 09:45The front-end hybrids for solid state and gas detectors will be crucial components of the next generation detectors. Requirements such as high-density and high-speed interconnects, low mass, radiation resistance and high- current and high-power dissipation capabilities are examples of the challenges to be solved concurrently. Over the past ten years we have been working on...Go to contribution page
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Stefanos Dris (Imperial College and CERN)27/09/2006, 11:20The potential application of advanced digital communication schemes in a future upgrade of the CMS Tracker readout optical links is currently being investigated at CERN. We show experimentally that multi-Gbit/s data rates are possible over the current 40 MSamples/s analogue optical links by employing techniques similar to those used in ADSL. The concept involves using...Go to contribution page
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Orlando Villalobos Baillie (University of Birmingham)27/09/2006, 11:20The ALICE Central Trigger Processor is designed to process signals from triggering detectors and send appropriate trigger signals and data to participating detectors. The ALICE system allows dynamic partitioning of the detector, past-future protection appropriate to each detector's electronics, and a number of different monitoring and diagnostic functions. The system has now...Go to contribution page
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Roman Lietava (University of Birmingham)27/09/2006, 11:40In this paper we discuss trigger signals synchronisation and trigger input alignment in the ALICE trigger system. The synchronisation procedure adjusts the phase of the input signals with respect to the local Bunch Crossing (BC) clock and, indirectly, with respect to the LHC bunch crossing time. Alignment assures that the trigger signals originating from the same bunch crossing...Go to contribution page
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Karl Aaron Gill (CERN)27/09/2006, 11:45Analogue and digital optical links developed at CERN are currently being integrated into the CMS Tracker in the magnet-test/cosmic challenge (MTCC), Tracker Integration Facility (TIF) and at the experiment site in Point 5. Similar activities with the same or very similar optical links are also underway for CMS ECAL as well as other CMS detector systems. Recent hardware developments...Go to contribution page
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Marian Krivda (Institute of Experimental Physics, Kosice, Slovakia)27/09/2006, 12:00The ALICE silicon pixel detector (SPD) constitutes the two innermost layers of the ALICE inner tracker system. The SPD contains 10 million pixels organized in 120 detector modules (half staves) connected to the off-detector electronics via bidirectional optical links. The front-end data streams are processed in 20 readout modules (Router), based on FPGAs, each carrying three 2-channel...Go to contribution page
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Cigdem Issever (University of Oxford)27/09/2006, 12:10The readout system of the ATLAS inner detector for SLHC will need to cope with ten time’s higher radiation doses than the current ATLAS inner detector readout system. It is an open question of whether the current opto-electronic readout system could be used at SLHC. We irradiated VCSEL and Si-Pin arrays at a 20 MeV neutron beam up to the levels expected at SLHC and monitored their...Go to contribution page
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Ivan Amos Cali (Universita degli Studi di Bari / CERN)27/09/2006, 12:20The ALICE Silicon Pixel Detector (SPD) contains nearly 10^7 hybrid pixel cells. About 2000 parameters and ~50000 DACs must be controlled in real-time during the detector integration, commissioning and operation. Information on each channel is stored in a configuration database. Timing and data management are critical issues. An overview of the SPD detector control system is presented,...Go to contribution page
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Kock Kiam Gan (The Ohio State University)27/09/2006, 12:35We study the feasibility of fabricating an optical link for the SLHC ATLAS silicon tracker based on the curret pixel optical link architecture. The electrical signal between the current pixel modules and the optical modules is transmitted via micro-twisted cables. The optical signal between the optical modules and the data acquisition system is transmitted via rad-hard SIMM fibers...Go to contribution page
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Gianluca Aglieri Rinella (CERN European Organization for Nuclear Research, Geneva)27/09/2006, 12:40The ALICE Silicon Pixel Detector contains 1200 readout chips. Fast-OR signals indicate the presence of at least one hit in the 8192 pixel matrix of each chip. The 1200 bits are transmitted together with data on 120 optical links using the G-Link protocol. The Level 0 Pixel Trigger System extracts and processes them to deliver an input signal to the Level 0 trigger processor within a...Go to contribution page
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Paschalis Vichoudis (CERN)27/09/2006, 14:15A plug-in module has been built for reception of optically transmitted data by gigabit applications. The optical receiving module is based on a 12-channel optical receiver and an FPGA with embedded deserializers. It is compatible with the G-Link and Gigabit Ethernet compliant serializer ASIC (GOL) used by many LHC systems. Due to its compact design, several of these modules...Go to contribution page
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Marco Costa (University of Torino)27/09/2006, 14:15The CMS tracker Power Supply System is made out of 2000 power supply modules where LV and HV channels are grouped together. A dedicated quality assurance plan, using a complex, remoted controlled Test Fixture, has been developped in collaboration between INFN-Torino and CAEN spa to test each single channel during and after production. Details on the test procedure and results that have...Go to contribution page
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Bruno Allongue (CERN)27/09/2006, 14:40Following a process of proof-of-concept on the requirements for radiation and magnetic filed tolerant low-voltage power supplies to be used to power silicon detectors in LHC experiments, a common procurement action was undertaken by the experiments and PH-ESS group. The evaluation and testing of advanced COTS radiation and magnetic field tolerant low-voltage power supplies is...Go to contribution page
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Andrea Triossi (Sez. INFN di Padova Italy)27/09/2006, 14:40PCI Express is a new I/O technology for desktop, mobile, server and communications platforms designed to allow increasing levels of computer system performance. The serial nature of its links and the packet based protocols allows an easy geographical decoupling of a peripheral device. We have investigated the possibility of using an optical physical layer for the PCI Express,...Go to contribution page
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Zbigniew Hajduk (Institute of Nuclear Physics PAN - Cracow, Poland and CERN Geneva)27/09/2006, 15:05We present a low voltage power supply system which has to deliver to the front end electronics of the ATLAS TRT detector ca. 24 kW of electrical power over the distance of 40-50 m (which adds another 24 kW). The system has to operate in magnetic field and under radiation environment of the LHC experimental cavern. The system has ~ 3000 individual channels which are all monitored and...Go to contribution page
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Sophie BARON (CERN)27/09/2006, 15:05The TTC (Timing, Trigger and Control) system broadcasts the timing signals from the LHC machine to the experiments. Once at the detector level, it integrates the trigger information and local synchronous commands with these signals, for transmission to several thousands of destinations. The equipment for this second part of the system is fully produced, but the main network between...Go to contribution page
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Georges Blanchot (CERN)27/09/2006, 15:30The front end electronics of the ATLAS Tile Calorimeter is powered by DC/DC conveters that sit close it. The performance of the detector electronics is constrained by the conducted noise emissions of its power supply. A compatibility limit is defined for the system. The noise susceptibility of the front end electronics is evaluated, and different solutions to reduce the front end...Go to contribution page
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Vicente Gonzalez Millan (Dep. Ingeniería Electrónica - Univ. Valencia)27/09/2006, 15:30This presentation aims to describe the architecture of the final optical multiplexer board (also known as preROD) for the TileCal experiment. The results of the first VME 6U prototype have led to the definition of the final block diagram and functionality of this prototype. Functional description of constituent blocks and the state of the work currently undergoing at the...Go to contribution page
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Ozgur Cobanoglu (Univ. + INFN)27/09/2006, 16:20PosterIn this paper we present an 8 channel full-custom ASIC prototype, named "CMAD", designed for the readout of the RICH-I detector system of the COMPASS experiment at CERN. The task of the chip is amplifying the signals coming from fast multi-anode photomultipliers and comparing them against a threshold adjustable on-chip on a channel by channel basis. CMAD was developed using a...Go to contribution page
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Georgios Sidiropoulos (University of Ioannina)27/09/2006, 16:20PosterA programmable random trigger emulation system has been built for use in high energy physics, nuclear physics or radiology experiments. The emulator is based on the generation of trigger time intervals using a true random bit generator. The system is able to work either as a stand alone trigger emulator or as a plug-in module for a trigger/readout system.Go to contribution page
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Emmanuel Vaumorin (PROSILOG), Thierry Romanteau (LLR Polytechnique)27/09/2006, 16:20PosterThe ECAL sub detector of the CMS experiment is composed of one barrel and two endcaps. The crystals of the endcaps are arranged on an X-Y grid. Mapping signal clusters on to the eta-phi coordinate system required for the trigger therefore presents a problem. The 48 channels Trigger Concentrator Card (TCC48) is designed to compute the trigger primitives of the different parts of each...Go to contribution page
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Guilherme Cardoso (Fermi National Accelerator Laboratory)27/09/2006, 16:20PosterThe Front-End R&D group at Fermilab has been developing pixel hybridized modules and silicon strip detectors for the past decade for high-energy physics experiments. To accomplish this goal, one of the activities the group has been working on includes the development of a high-speed and high-bandwidth data acquisition and test system to characterize front-end electronics. In this paper,...Go to contribution page
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Tobias Flick (Bergische Universitaet Wuppertal)27/09/2006, 16:20PosterThe ATLAS detector is one of the LHC experiments going to start data taking in 2007. The innermost subdetector of ATLAS will be a pixel detector. It consists of 1744 pixel modules which are controlled and read out via optical signals. The off detector end of the optical link is the Back of Crate card which is performing the optical-electrical conversion and adopting the timing for the...Go to contribution page
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Andres Russu (Astronomy and Space Science Group - ICMUV - University of Valencia)27/09/2006, 16:20PosterThe aim of this paper is to present the preliminary background modelling results of the Miniature X-and Gamma-ray Sensor (MXGS) instrument in the Atmospheric-Space Interaction Monitor (ASIM). ASIM is an atmosphere event observatory with a wide energy range (from optical to gamma-ray) foreseen to be located at the external facility of the Columbus Module at the ISS in 2009. The model...Go to contribution page
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Alexander Singovski (University of Minnesota & CERN)27/09/2006, 16:20PosterThe final design of the low voltage power system of the CMS ECAL detector will be presented. The particular requirements of the ECAL on-detector electronics powering will be discussed and details of the W-IE-NE-R MARATON system design related to these features will be pointed out. All tests performed with the ECAL-specific version of the MARATON power supply units will be summarized. The...Go to contribution page
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Alexander Singovski (University of Minnesota & CERN)27/09/2006, 16:20PosterCMS ECAL detector will require more than 400 dense multi-ribbon optical cables, made of single mode 9 micron quartz fibers, for the data, control and trigger data transfer between on-detector and off-detector electronics. Although all cables will be tested before installation, one cannot guarantee no single fiber damage during the mass cable pooling campaign at the underground area....Go to contribution page
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Jan Troska (CERN)27/09/2006, 16:20PosterThe CMS Tracker will install over 40000 optical links in its data readout and control system, representing an unprecedented deployment of this technology in a Particle Physics Experiment. After reviewing the Quality process employed in this project, a summary of the performance data measured during production will be shown. The analysis of this data will then be used to illustrate how...Go to contribution page
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Robert Bainbridge (Imperial College London)27/09/2006, 16:20PosterThe CMS micro-strip tracker data acquisition system is based on an analogue front-end ASIC, optical readout and an off-detector VME board that performs digitization, zero-suppression and data formatting before forwarding event fragments to the online event-building farm. Sophisticated “commissioning” procedures are required to optimally configure, calibrate and synchronize the 10M...Go to contribution page
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Géza Székely (Institue of Nuclear Research, ATOMKI, Debrecen, Hungary)27/09/2006, 16:20PosterThe CMS Barrel Muon Alignment System is composed of a series of elements - each of large quantity - to be calibrated individually and together after assembly. This requires an approach based on modular control and data acquisition hardware and software including data validation features during data taking. The measured data of all calibration steps (including full images) are stored in...Go to contribution page
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Hans Kristian Soltveit (University Heidelberg Physikalisches institut)27/09/2006, 16:20PosterThe Compressed Baryonic Matter (CBM) experiment is a dedicated heavy-ion experiment at the future accelerator Facility for Antiproton and Ion Research (FAIR), in Darmstadt. A Fast Transition Radiation detector will be part of this experiment. The high reaction rates up to 10^7 event s^-1 require electronics with fast shaping time. A preamplifier for the FAST-TRD detector has been...Go to contribution page
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Farida Fassi (IFIC- Instituto de Fisica Corpuscular)27/09/2006, 16:20PosterThe ATLAS experiment currently under construction at CERN's Large Hadron Collider presents data processing requirements of an unprecedented scale. ATLAS will accrue tens of petabytes of data per year, distributed around the world: the collaboration comprises more than 1800 physicists from 150 institutions in 34 countries. The Distributed Analysis (DA) system has the goal of enabling ATLAS...Go to contribution page
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Nigel Smale (Nuclear Physics Laboratory)27/09/2006, 16:20PosterThe F-CSA104 is a low noise, fully integrated, four channel preamplifier produced in the CMOS 0.6um XFAB XC06 process, which has been developed for the GERDA experiment. Each channel contains a charge sensitive preamplifier (CSA) followed by a fast differential line driver for driving a 100 Ohm twisted pair cable over 10m. It has a measuring sensitivity of 5.8 mV/fC with an expected ENC...Go to contribution page
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Marco Boccioli (European Organization for Nuclear Research (CERN))27/09/2006, 16:20PosterThe Time Projection Chamber (TPC) is the core of the ALICE experiment at CERN. The ALICE TPC is an 88m3 cylinder filled with gas and divided in two drift regions by the central electrode located at its axial centre. The drift field is generated by a 100kV power supply. The TPC Very High Voltage project covers the development of the control system for the power supply. This paper...Go to contribution page
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Mikhail Matveev (Rice University)27/09/2006, 16:20PosterThe results of data transmission tests over custom backplane, copper and optical links at a multiples of the LHC bunch clock frequency are presented. We have evaluated a parallel data transmission at 80MHz and 160MHz using the GTLP and LVDS standards as well as serial copper and optical links operating at 3.2Gbps.Go to contribution page
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Jonathan Emery (CERN)27/09/2006, 16:20PosterIn the frame of the design and development of the beam loss monitoring (BLM) system for the Large Hadron Collider (LHC) a flexible tester has been developed to qualify and verify during design and production a data acquisition card. It permits to test completely the functionalities of the board as well as realizing analog input signal generation to the acquisition card. The system...Go to contribution page
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Sam Silverstein (Stockholm University)27/09/2006, 16:20The challenges of producing high-performance and low-latency realtime systems for LHC have led many groups to design systems with higher channel density and greater interconnectivity between modules. Custom backplanes with 2mm Hard Metric connectors provide the high pin counts necessary for these systems, but also present new problems, including increased insertion and extraction...Go to contribution page
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Satish Dhawan (Yale University)27/09/2006, 16:20PosterWe are exploring various way of employing 48 volt DC-DC converters capable of running in high magnetic fields and /or radiation environments of the SLHC and ILC detectors. Tradeoffs with respect to voltage conversion ratios, currents deliverable, radiation, and magnetic field are explored.Go to contribution page
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Rafael Antunes Nobrega (Universita di Roma I "La Sapienza")27/09/2006, 16:20PosterThe Muon Detector of LHCb will be equipped with about 1380 Multi-Wire Proportional Chambers. Within the Framework of the CERN Control System Project, using PVSS as the main tool, we are developing an instrument to manage such a system. Adjustment and monitoring of High and Low Voltage power supplies, on-line diagnostics and fine tuning of the Front-End read-out devices, data...Go to contribution page
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Pavel Weber (Kirchhoff-Institut fur Physik (KIP))27/09/2006, 16:20PosterThe Pre-Processor Multi-Chip Module (PPrMCM) is the main processing block of the Pre-Processor System in the ATLAS Level-1 Calorimeter Trigger. The PPrMCM holds a dedicated signal-processing ASIC and a Phos4 timing-chip together with seven commercial dice mounted on the substrate. Those are four FADCs and three LVDS-serialisers. The PPrMCM holds the main functionality of the...Go to contribution page
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Diogo Nunes Caracinha (Faculdade de Ciencias)27/09/2006, 16:20PosterThe interface between the ATLAS Central Trigger Processor (CTP) and the sub- detectors read-out systems is done through the Local Trigger Processor modules. These modules allow each sub-system to either run in global mode when it gets the timing and trigger signals from the CTP or in local mode when it handles locally its trigger and timing signals. During the commissioning phase of the...Go to contribution page
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Massimo Manghisoni (Università degli Studi di Bergamo)27/09/2006, 16:20PosterDeep sub-micron CMOS technologies are widely used for the implementation of front-end electronics in various detector applications. The IC designers’ effort is presently shifting to 130 nm CMOS technologies, or even to the next technology node, to implement readout integrated circuits for silicon strip and pixel detectors, in view of future HEP applications. In this work the results of...Go to contribution page
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Ulrich Trunk (Max-Planck-Institut f. Kernfphysik)27/09/2006, 16:20PosterFor a new generation of 2-D neutron detectors developed in the framework of the EU NMI3 project DETNI [8], the 128-channel frontend chip n-XYTER has been developed. To facilitate the reconstruction of single neutron incidence points, the chip has to provide a spatial coordinate (represented by the channel number), as well as time stamp and amplitude information to match the data of x- and...Go to contribution page
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Magali Magne (Laboratoire de Physique Corpusculaire de Clermont-Ferrand (LPC))27/09/2006, 16:20PosterThe GPL board is an optical pattern generator for the L0 Decision Unit (L0DU). Its design is based on three FPGAs in BGA package which can send 24*16bits @ 80 MHz via 24 optical fiber link running at 1.6 Gb/s. One FPGA is used for the control of the board, via USB or through L0DU, and two processing FPGAs are used to control the optical channel. Each processing FPGA controls twelve...Go to contribution page
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Thijs Wijnands (CERN)27/09/2006, 16:20PosterA statistical summary on 6 years radiation testing for the LHC machine and experiments will be presented. The data shows that radiation tolerance assurance to cumulative damage effects was taken into account as an engineering constraint in a rather early stage in the project. The issue of Single Event Errors was only recognized as major issue at a much later stage in the project...Go to contribution page
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Pietro Antonioli (INFN - sezione di Bologna)27/09/2006, 16:20PosterThe read-out modules of the ALICE Time-of-flight (TOF) system will be hosted in custom VME crates near the apparatus in a moderately hostile environment. Commercially available options to provide remote VME connection to the crate have been considered to provide slow control functionalities. The main slow control channel will be implemented through an optical link based on the...Go to contribution page
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Ervin Denes (KFKI Research Institute for Particle and Nuclear Physics)27/09/2006, 16:20PosterThe ALICE Detector Data Link (DDL) is a high-speed optical link designed to interface the readout electronics of ALICE sub-detectors to the DAQ computers. The Source Interface Unit (SIU) of the DDL will operate in radiation environment. Tests showed that configuration loss of SRAM-based FPGA devices used on the prototype of DDL SIU card was not acceptable. We developed a new version of...Go to contribution page
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Gregory Michiel Iles (European Organization for Nuclear Research (CERN))27/09/2006, 16:20PosterA revised design of Global Calorimeter Trigger (GCT) has been implemented. The primary function of the GCT is to process the Regional Calorimeter Trigger (RCT) data and transmit a summary to the Global Trigger (GT) which computes the First Level Trigger Accept (L1A) decision. The GCT must also transmit a copy of the RCT and GCT data to the CMS DAQ. This paper presents an...Go to contribution page
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Pablo Vazquez Regueiro (Universidad de Santiago de Compostela)27/09/2006, 16:20PosterThe Inner Tracker of the LHCb experiment is a silicon microstrip detector consisting of 336 detector modules with either one or two sensors. The module production is now underway and we present here the setup employed for module testing during the production. The setup is based in the same electronics that will e used in the final experiment. We perform burning and ageing tests with...Go to contribution page
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Alexandra Dana Oltean Karlsson (Polytechnic Institute of Bucharest/CERN)27/09/2006, 16:20PosterLHC detectors and future experiments will produce very large amount of data that will be transferred at multi-Gigabit speeds. At such PCB data rates, signal- integrity effects become important and traditional rules of thumb are no longer enough for the design and layout of the traces. Simulations for signal-integrity effects at board level provide a way to study and validate several...Go to contribution page
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Jose Torres Pais (Dept. Ingenieria Electronica-Universidad de Valencia)27/09/2006, 16:20PosterThe Optical Multiplexer Board is a card included in the TileCal Data Acquisition System; it is designed to receive two optical fibers with same data from front-end boards and decided which has correct data. Inside this card we have different transmission lines that need to be studied; signal integrity problems such as signal delay, reflection, distortion and coupling should be...Go to contribution page
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27/09/2006, 16:20
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Jim Brooke (H.H. Wills Physics Laboratory)27/09/2006, 16:20PosterThe CMS Global Calorimeter Trigger (GCT) control and test software is described. An object-oriented model of the GCT hardware, based on the CMS Hardware Access Library (HAL), was written in C++. The SWIG software interface generator was then used to produce a python interface to the model. This allows the hardware to be controlled from a python script or shell, providing a flexible...Go to contribution page
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Ankush Mitra (Institute of Physics, Academia Sinica, Taipei, Taiwan)27/09/2006, 16:20PosterThe CDF Run II Silicon detector is one of the largest operating Silicon detectors in high energy physics. It has 6m2 of Silicon sensors with 722,432 channels read out by 5456 chips. The Silicon detector allows precision tracking, vertexing and is used in the hardware displaced vertex trigger. The CDF silicon detector had a very challenging commissioning period of 18 months. However...Go to contribution page
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Lax Ignazio (INFN Bologna-LHCb)27/09/2006, 16:20PosterThis report presents the boards developed for the optical data transmission of the calorimeter system of the LHCb experiment and test results. We developed two types of transmission boards: the single-channel and the multi-channel ones. Multi- channel boards can be equipped with a variable number of transmitters, depending on the need, with a maximum allowed of 12 channels. Each optical...Go to contribution page
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Claudio Arnaboldi (Sezione di Milano dell'INFN and Dipartimento di Fisica dell'Università di Milano-Bicocca, P.za della Scienza 3, Milano I-20126, Italy)27/09/2006, 16:20PosterWe present the High Voltage, HV, distribution system for the Hybrid Photon Detectors (HPDs) of RICH1 and RICH2, at LHCb (484 HPDs in total). The HVs ( -20 kV, -19.7 kV and -16.4 kV) are supplied by printed circuit boards specially developed to prevent electrostatic discharges and/or corona effects using the limited available volume of the HPD arrays. The circuits that will be presented...Go to contribution page
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Anton Taurok (Institut fuer Hochenergiephysik (HEPHY)), Manfred Jeitler (Institut fuer Hochenergiephysik (HEPHY))27/09/2006, 16:20PosterThe trigger of the CMS experiment consists of two stages: the first stage, or Level-1 Trigger is implemented in hardware processors while the second stage, or High-level Trigger is implemented in software running on a computer farm. The Level-1 Trigger has to deliver a trigger decision for each LHC bunch crossing, i.e. at a rate of 40 MHz. The Level-1 Global Trigger uses objects...Go to contribution page
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Christos Zamantzas (CERN)27/09/2006, 16:20PosterThe strategy for machine protection and quench prevention of the Large Hadron Collider (LHC) at the European Organisation for Nuclear Research (CERN) is presently based on the Beam Loss Monitoring (BLM) system. At each turn, there will be several thousands of data to record and process in order to decide if the beams should be permitted to continue circulating or their safe extraction is...Go to contribution page
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Markus Friedl (HEPHY Vienna)27/09/2006, 16:20PosterThe APV25 front-end chip for the CMS Silicon Tracker has a peaking time of 50ns, but confines the signal to a single clock period (=bunch crossing) with its internal deconvolution filter. This method requires a beam-synchronous clock and thus cannot be applied to a (quasi-) continuous beam. Nevertheless, using the multi-peak mode of the APV25, where 3 (or 6,9,12,...) consecutive shaper...Go to contribution page
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Ping Gui (Southern Methodist University)27/09/2006, 16:20PosterSilicon-On-Sapphire (SOS) CMOS technology has been attractive to radiation tolerant applications. The Sapphire substrate eliminates single-event latch-up (SEL) and reduces the possibility of single event upset (SEE), but the back-channel leakage current could cause problems to circuitry made in this technology. To better understand the radiation effects in this technology and evaluate its...Go to contribution page
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Manfred Muecke (CERN)27/09/2006, 16:20PosterWe show an alternative design approach for signal processing algorithms implemented on FPGAs. Instead of writing VHDL code for implementation, and maintaining a C-model for algorithm evaluation, we derive both models from one common source allowing generation of synthesizeable VHDL and cycle- and bit-accurate C-Code. We have tested our approach on the LHCb VELO pre-processing...Go to contribution page
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Jan Knopf (Ruprecht-Karls-Universitat Heidelberg)27/09/2006, 16:20PosterThe OTIS-TDC is a 32 channel time to digital converter chip developed in Heidelberg for the LHCb Outer Tracker experiment. Designed in a 0,25 $\mu m$ CMOS process, it can measure times with a resolution better than 1\,ns. As the chip is directly mounted to its board, the test have to be performed on the wafer itself. As the testing period for 7\,000 chips was only three weeks, many test...Go to contribution page
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Ray YAREMA28/09/2006, 09:00Industry is pursuing 3D integrated circuits to enhance circuit performance. The techniques and technologies being employed can be of benefit to the High Energy Physics community. There are two general approaches that can be followed: die to wafer bonding, and wafer to wafer bonding. Each has its own benefits. Both of these approaches are being investigated at Fermilab. The...Go to contribution page
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Franco MALOBERTI (University of Pavia)28/09/2006, 09:45Modern and future ultra-deep-submicron technologies make challenging the analog design especially when power consumption must match digital counterparts. The decrease of the supply voltage reduces the voltage headroom in analog circuits, the gate leakage current increases, the voltage gain decreases in planar bulk transistors, 1/f noise deteriorate when using new high- k gate...Go to contribution page
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Gilles Mahout (The University of Birmingham)28/09/2006, 10:55The Level-1 Calorimeter Trigger is a digital pipelined system, reducing the 40 MHz bunch-crossing rate down to 75 kHz. It consists of a Preprocessor , a Cluster Processor (CP), and a Jet/Energy-sum Processor (JEP). The CP and JEP receive digitised trigger-tower data from the Preprocessor and produce electron/photon, tau, and jet trigger multiplicities, total and missing transverse...Go to contribution page
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Jean-Francois Genat (CNRS/IN2P3/LPNHE)28/09/2006, 10:55For the years to come, Silicon strips detectors will be read using the smallest available integrated technologies for room, transparency, and power considerations. CMOS, Bipolar-CMOS and Silicon-Germanium are presently offered in deep-submicron (250 down to 90nm) at affordable cost through worldwide integrated circuits multiproject centers. As an example, a 180nm CMOS readout prototype...Go to contribution page
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Vladimir Gromov (NIKHEF)28/09/2006, 11:20Abstract. Owing to a novel concept of the detection of the single electrons in gas, the GOSSIP chip will hold certain advantages over an ordinary silicon pixel readout chip. Of these, no need for silicon sensor at all, low detector parasitic capacitance and none of the bias current at the pixel are the attractive features to design a compact low-noise and low-power integrated front-end...Go to contribution page
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Tobias Henss (Univerity of Wuppertal)28/09/2006, 11:20The innermost part of the ATLAS experiment will be a pixel detector, built around 1750 individual detector modules. To operate the modules, readout electronics and other detector components, a complex power supply and control system is necessary. The unique power, grounding and control requirements are described, along with the custom made components of our power and control...Go to contribution page
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Belen Salvachua (IFIC (UV - CSIC))28/09/2006, 11:40The hadronic Tile Calorimeter of ATLAS generates ~10000 digitized pulses of 10-bit samples spaced in time 25 ns. In order to read-out and process these data the Read Out Driver boards (RODs) are equipped with real time fixed-point Digital Signal Processors. The processed information is sent to the second level trigger. This paper explains the performance of an algorithm to...Go to contribution page
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Maurice Garcia-Sciveres (Lawrence Berkeley National Lab), Robert Ely (Lawrence Berkeley National Lab)28/09/2006, 11:45We present the results of irradiation tests of a 0.13um test chip containing ATLAS pixel analog front end circuits and various types of memory cells. The irradiations were carried out at the LBNL 88” cyclotron with 50 MeV/c protons and 16 MeV/c light ions for SEU studies. The front end circuits perform well up to the highest dose achieved at the moment, which is 1E15 p/cm^2. The linear...Go to contribution page
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Domenico Lo Presti (CATANIA UNIVERSITY - PHYSICS DEPARTMENT)28/09/2006, 12:00The work described here has been developed in the context of the NEMO Collaboration with the aim of studying and designing a front-end electronics for the Optical Modules, which contain the telescope optical sensors, as a full-custom Very Large Scale Integration ASIC. The solution has a multitude of advantages. The most important are low power consumption and the preanalysis and...Go to contribution page
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Giulia Papotti (CERN (PH-MIC) and Universita degli Studi di Parma)28/09/2006, 12:10This paper presents an ASIC implementing the line encoding scheme to be used in the GBT system, a multi-gigabit optical link designed for use in future luminosity improvements of the LHC. A general overview of issues specific to optical links placed in radiation environments is given, and the required properties of the line encoding discussed. A scheme that preserves the...Go to contribution page
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Alejandro Gil (IFIC)28/09/2006, 12:20Time of flight detectors are used for both particle identification and triggering. RPC detectors are becoming widely used because their excellent TOF capabilities and reduced cost. The new ESTRELA Resistive Plate Chamber (RPC) detector, which is currently being installed in the HADES detector at Darmstadt GSI, will contain 1000 RPC modules, covering a total active area of 8 m2....Go to contribution page
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Hirokazu Ishino (Tokyo Institute of Technology)28/09/2006, 12:35We are developing a monolithic radiation pixel detector using silicon on insulator (SOI) with a commercial 0.15um fully-depleted-SOI technology and a Czochralski high resistivity silicon substrate in place of a handle wafer. Nine types of SOI TEG chips with a size of 2.5 x 2.5 mm^2 consisting of 20um pixels have been designed and manufactured. The I-V measurement, a laser light...Go to contribution page
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Ricardo Marco-Hernández (Instituto de Física Corpuscular (IFIC), Universidad de Valencia-CSIC, Valencia, Spain.), Salvador Martí i García (Instituto de Física Corpuscular (IFIC), Universidad de Valencia-CSIC,Valencia, Spain.)28/09/2006, 12:40A portable readout system for silicon microstrip sensors is currently being developed. This system uses a front-end readout chip, which was developed for the LHC experiments. The system will be used to investigate the main properties of this type of sensors and their future applications. The system is divided in two parts: a daughter board and a mother board. The first one...Go to contribution page
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Geoff HALL (Imperial College of London)28/09/2006, 14:00
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Andy BUTTERWORTH28/09/2006, 14:15
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Mauricio Garcia-Sciveres (Lawrence Berkeley National Lab), Robert Ely (Lawrence Berkeley National Lab)28/09/2006, 14:35We present results from a capacitor charge pump DC- DC converter prototype using 0.35um HV-CMOS technology fabricated in April 2006. The purpose of this prototype is to test the switch technology both for achievable efficiency and for radiation tolerance. The IC of this test device contains only switches, with all clocks being externally supplied and driven and the capacitors also...Go to contribution page
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28/09/2006, 15:00
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Paulo MOREIRA28/09/2006, 15:55
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28/09/2006, 16:25
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Francois VASEY (CERN)28/09/2006, 16:45
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28/09/2006, 17:10
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Andy BUTTERWORTH29/09/2006, 09:00The main RF system of the LHC, which uses 400MHz superconducting cavities, will be used to capture, accelerate and store the injected beam. A separate transverse damper system using electrostatic deflectors will be used to damp transverse oscillations. The associated low-level RF (LLRF) equipment is responsible for fast control of the accelerating voltage and phase in the...Go to contribution page
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Ewald Effinger (CERN)29/09/2006, 09:45The beam loss monitoring (BLM) system is one of the most important elements for the protection of the Large Hadron Collider (LHC). It aims to protect the superconducting magnets from quenches and the machine components from damages, caused by beam losses. The losses are measured with ionization chambers and secondary emission monitors at likely loss locations. About 4000 monitors will...Go to contribution page
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Thijs Wijnands (CERN)29/09/2006, 10:10With an unprecedented amount of electronic systems exposed to radiation in the LHC, reduced operational efficiency due to radiation induced failures in electronic equipment has become an issue for both the machine and the experiments. The RADMON radiation monitoring system presented here has been designed to measure radiation at the location of electronic equipment in the LHC tunnel...Go to contribution page
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Richard Jacobsson (CERN)29/09/2006, 11:00The LHC RF clock is transmitted over kilometres of fibre to the experiments where it is distributed to thousands of front-end electronics boards. In order to ensure that the detector signals are sampled properly, its long-term stability with respect to the bunch arrival times must be monitored with a precision of <100ps. In addition it is important to monitor the LHC bunch structure...Go to contribution page
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Fabrizio Palla (INFN)29/09/2006, 11:25A proposal for a pixel based Level-1 trigger for the Super-LHC is presented. The trigger is based on fast track reconstruction using the full pixel granularity exploiting a readout which connects different layers in specific trigger towers. The trigger will implement the current CMS High Level Trigger functionality using dedicated ASIC and FPGA, in a novel concept of intelligent detector....Go to contribution page
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John Jones (Imperial College London)29/09/2006, 11:50We report on recent work on the design of a pixel detector for CMS at the Super-LHC. This work builds on previous studies on a tracking detector capable of providing track stubs to be used in the Level-1. We now focus on the use of two layers of tracking, each comprising stacks of pixel sensors with 20x50x10μm3 pitch (θxφxr) and separated by a few millimetres. Preliminary work on track...Go to contribution page
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29/09/2006, 12:15
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