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The workshop will take place in conference room 222/R-001
High data rate ASICs
New link technologies
Power and readout efficiency
introduction talk
This is tentative title of the presentation. The final title will be updated soon by the presenter.
This is tentative title of the presentation. The final title will be updated soon by the presenter.
This is tentative title of the presentation. The final title will be updated soon by the presenter.
open discussion
material to help discussion
FE programmability, modularity and configurability
Intelligent power management
Advanced data reduction techniques (ML, AI)
High performance sampling (TDCs, ADCs)
High precision timing distribution
Novel on-chip architectures
In this part, we will discuss the challenges of specifying the timing requirements for high precision timing in detectors.
Radiation hardness
Cryogenic temperatures
Reliability, fault tolerance, detector control
Cooling
Novel microelectronic technologies, devices, materials
Silicon photonics
3D-integration and high-density interconnects
Keeping pace with, adapting and interfacing to COTS
Foundries
CAE
Test and Measure
Design support