ACES 2016 - Fifth Common ATLAS CMS Electronics Workshop for LHC Upgrades
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Europe/Zurich
30/7-018 - Kjell Johnsen Auditorium (CERN)
Magnus Hansen
(CERN),
Philippe Farthouat
(CERN)
Description
This workshop will be dedicated to electronic issues for upgrades, focusing on subjects where common features or developments are likely. Developments for upgrades for proton-proton and heavy ion running for Phase I and for high luminosity LHC (HL-LHC) will be included.
The following main areas will be covered:
- Front-end electronics developments for Phase I and HL-LHC
- Electronics systems for triggering at Phase I and HL-LHC, including level-1 tracking trigger and the use of modular electronics standards such as xTCA
- Electronics systems for DAQ and DCS at HL-LHC
- High precision timing measurement and clock distribution systems
- Optical and electrical links
- Power distribution and low power design techniques
- IC technologies and radiation hardness issues
- Progress on upgrades for HL-LHC
The oral presentations will be made by invitation. A poster session will be organised for which abstracts will have to be submitted on the indico page. More details can be obtained in contacting a member of the Programme Committee:
- Anna Colaleo (INFN BARI)
- Christophe de la Taille (IN2P3 OMEGA)
- Kevin Einsweiler (LBL)
- Philippe Farthouat (CERN)
- Costas Foudas (University of Ioannina)
- Alex Grillo (UCSC)
- Magnus Hansen (CERN)
- Oliver Kortner (MPI)
- Francesco Lanni (BNL)
- David Sankey (STFC – RAL)
- Jeff Spalding (FNAL)
- Francois Vasey (CERN)
- Administrative assistance will be provided by Evelyne Dho (CERN)
Registration is free (except for the conference dinner), but participants must register online before
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Participants
181
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Webcast
There is a live webcast for this event
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Registration 30/7-018 - Kjell Johnsen Auditorium
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Session 1: Machine and experiments upgrade programs 30/7-018 - Kjell Johnsen AuditoriumConvener: Philippe Farthouat (CERN)
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ATLAS upgradeSpeaker: Kevin Einsweiler (Lawrence Berkeley National Lab. (US))
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CMS upgradeSpeaker: Didier Claude Contardo (Universite Claude Bernard-Lyon I (FR))
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LHCb upgradeSpeaker: Ken Wyllie (CERN)
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16:00
Tea Break 30/7-018 - Kjell Johnsen Auditorium
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Session 2: IC technologies and radiation hardness 30/7-018 - Kjell Johnsen AuditoriumConvener: Alex Grillo (University of California,Santa Cruz (US))
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Development kits foundriesSpeaker: Kostas Kloukinas (CERN)
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IP blocks and design sharingSpeaker: Michael Campbell (CERN)
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Session 3: Power 30/7-018 - Kjell Johnsen AuditoriumConvener: Francois Vasey (CERN)
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Developments for serial power applicationsSpeaker: Dr Laura Gonella (University of Birmingham (UK))
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Possible overall powering scheme for the outer trackersSpeaker: Peter Phillips (STFC - Rutherford Appleton Lab. (GB))
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Muon special needsSpeaker: Sergei Lusin (University of Wisconsin-Madison (US))
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Calorimeters special needsSpeaker: Mauro Citterio (Università degli Studi e INFN Milano (IT))
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10:45
Coffee Break 30/7-018 - Kjell Johnsen Auditorium
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Session 4: Data transmission 30/7-018 - Kjell Johnsen AuditoriumConvener: Jeffrey Spalding (Fermi National Accelerator Lab. (US))
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The LpGBT Project, Status and OverviewSpeaker: Paulo Rodrigues Simoes Moreira (CERN)
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Copper linksSpeaker: Martin Kocian (SLAC National Accelerator Laboratory (US))
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non-GBT links for data transmissionSpeaker: Merritt Philip Miller (Univ. of California Santa Barbara (US))
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13:00
Lunch Break 30/7-018 - Kjell Johnsen Auditorium
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Session 5: Timing measurement and clock distribution 30/7-018 - Kjell Johnsen AuditoriumConvener: Magnus Hansen (CERN)
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Picosecond Timing: Applications and Technologies Towards Mitigating the Effects of High-PileupSpeaker: Lindsey Gray (Fermi National Accelerator Lab. (US))
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TTC PONSpeaker: Sophie Baron (CERN)
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picoTDC: Design of a TDC with picosecond resolution in 65nmSpeaker: Moritz Horstmann (CERN)
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Poster 30/7-018 - Kjell Johnsen Auditorium
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The Versatile Link Demontrator Board (VLDB)The Versatile Link Demonstrator Board (VLDB) is the evaluation kit for the Radiation Hard Optical Link ecosystem, which provides a 4.8 Gbps data transfer link for communication between front-end and back-end of the experiments. It gathers the Versatile Link main radiation hard custom ASICs: GBTx, GBT-SCA and VTRx/VTTx plus the FeastMP, a radiation hard in-house designed DCDC. This board is the first allowing system-level tests with a complete interconnection of the constitutive components. The VLDB board as well as a system test example using multiple interconnected VLDBs will be presented in this poster.Speaker: Raul Martin Lesma (Centro de Investigaciones Energ. Medioambientales y Tecn. - (ES)
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Rad-Hard Vertical JFET switch for the HV-MUX system of the ATLAS upgrade ITkThis work presents a new silicon vertical JFET transistor, based on a trenched technology developed at the IMB-CNM, to be used as switch for the High-Voltage power distribution in the ATLAS upgrade Inner Tracker. After a thorough optimization work, performed by TCAD simulations, selected designs have been chosen for device fabrication at the IMB-CNM clean room. The first prototypes have been recently produced, and the first characterization results show excellent agreement with simulation, already meeting the ITk specifications. The technological process and the simulated rad-hard prospects will be also shown.Speaker: Dr Pablo Fernandez-Martinez (Instituto de Microelectrónica de Barcelona (IMB-CNM,CSIC))
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Status update and future plans for the GBT-FPGA project at CERNThe poster focuses on the main release foreseen for June 2016 including the slow control. This feature is used to monitor/control the front-end electronics. It allows configuring the GBTx and communicating with the SCA. One GBT link can be used to control up to 21 SCAs. Different types of commands will be implemented to use all the available interfaces. The poster also report a status on the GBT-FPGA project with the descriptions of the latest releases (support of the latest development tools, bug corrections …) and the plans for the future versions (new FPGAs to be supported).Speaker: Julian Maxime Mendez (CERN)
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The use of the ATLAS Small Wheel front end Electronics for the HL-LHC MDT upgradeThe use of the ATLAS New Small Wheel electronics readout architecture for the trigger and readout of the Monitored Drift Tube (MDT) detectors of the ATLAS Muon Spectrometer in the HL-KHC is proposed. In the core of the proposal is the VMM, the front end ASIC that will be used for bothe Micromegas and sTGC detectors.Speaker: Venetios Polychronakos (Brookhaven National Laboratory (US))
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Preliminary Experimental Results of A 14-bit Split-SAR ADC for ATLAS LAr Phase-II UpgradePreliminary experimental results of a 14-bit split-SAR ADC prototype implemented in 65-nm CMOS are reported. Inherent architectural redundancy and the newly proposed SEE-detection circuitry constitute two prominent features of this work for efficient SEE detection and correction (to be experimentally verified). With FIB and foreground calibration, the prototype ADC measured a 74.6-dB peak SNDR and a 97.2-dB SFDR at 40 MSPS for a single channel of the two split paths. More measurements and especially irradiation tests will be performed in the near future.Speaker: Dr Yun Chiu (Department of Electrical Engineering, University of Texas at Dallas)
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Timepix detector network for luminosity monitoring and characterization of the radiation fields within the ATLAS cavernA network of 13 Timepix detector based devices consisting of two sensitive sensors interlaced by neutron converter layers was installed at different locations in the ATLAS detector cavern during the recent shut-down. In this poster, we present the calibration measurements (photons, neutrons and ions) of the individual devices, their positions within the ATLAS cavern, the data acquisition scheme, preliminary results of selected devices and the online data visualization.Speaker: Benedikt Ludwig Bergmann (Czech Technical University (CZ))
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Design of low power 12bit 40MSPS SAR ADCs with a redundancy algorithm and digital calibration for high dynamic range calorimeter readoutWe present two SAR ADCs using a generalized redundant search algorithm and offering the flexibility to relax the requirements on the DAC settling time. Two more bits of redundancy allow also a digital calibration, based on a code density analysis to compensate the capacitors mismatching effects. A monotonic switching algorithm is used for these prototypes saving about 70% of dynamic power consumption compared to conventional switching algorithm. A fully differential was used for both prototypes featuring 12bit 40MS/s in a CMOS 130nm 1P8M process.Speaker: Daniel Dzahini (LPSC/IN2P3)
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The intelligent, FPGA-based event builder and Data Acquisition System of COMPASS – an exemplary system for the future?Using FPGA-technology for event building tasks in high-energy physics experiments reduces costs and increases reliability of DAQ-systems. In 2015, COMPASS experiment at CERN’s SPS commissioned a novel, intelligent, FPGA- based DAQ (iFDAQ) in which event building is performed by FPGAs. The highly scalable system is designed to cope with an on-spill data rate of 1.5 GB/s and sustained data rate of 500 MB/s. Its event builder is able to handle front-end errors and to maintain continuous data flow. The intelligent and highly reliable hardware automatically compensates hardware failures and balances load.Speaker: Dominik Steffen (Technische Universitaet Muenchen (DE))
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ATLAS LAr Phase II upgrade of the Front End ElectronicsThe Phase II upgrade of the ATLAS Liquid Argon detector includes a 17 bit dynamic range front end amplifier with a two or three gain multi‐pole shaper employing CR‐(RC)n shaping. Each gain stage of the shaper will be followed by a 40Msps, 14b dynamic range, 12‐13b ENOB digitizer, serializer and fiber optic driver. A study is underway to see if a single technology (65nm or 130nm CMOS) will be suitable for all blocks up to the optical Link, enabling consideration of the development a Front End System On a Chip (FESOC).Speaker: Mitchell Franck Newcomer (University of Pennsylvania (US))
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16:00
Tea Break 30/7-018 - Kjell Johnsen Auditorium
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Session 6: Tracking trigger 30/7-018 - Kjell Johnsen AuditoriumConvener: David Sankey (STFC - Rutherford Appleton Lab. (GB))
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Current ATLAS FTKSpeaker: Matteo Mario Beretta (Istituto Nazionale Fisica Nucleare Frascati (IT))
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ATLAS R&D for HL-LHCSpeaker: Nikos Konstantinidis (University College London (UK))
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CMS R&D for HL-LHCSpeaker: Kristian Hahn (Northwestern University (US))
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Sesssion 7: Outer trackers 30/7-018 - Kjell Johnsen AuditoriumConvener: Costas Fountas (University of Ioannina (GR))
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ATLAS physical layoutSpeaker: Prof. Stephen Mcmahon (STFC - Rutherford Appleton Lab. (GB))
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ATLAS Silicon Strips ElectronicsSpeaker: Alex Grillo (University of California,Santa Cruz (US))
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10:45
Coffee Break 30/7-018 - Kjell Johnsen Auditorium
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Session 8: Pixel detectors 30/7-018 - Kjell Johnsen AuditoriumConvener: Kevin Einsweiler (Lawrence Berkeley National Lab. (US))
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RD53 status; schedule; …Speaker: Elia Conti (CERN)
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ATLAS IBL phase 0Speaker: Didier Ferrere (Universite de Geneve (CH))
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CMS Px phase 2Speaker: Jorgen Christiansen (CERN)
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ATLAS px phase 2Speaker: Tobias Flick (Bergische Universitaet Wuppertal (DE))
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HV and HR CMOSSpeaker: Tomasz Hemperek (Universitaet Bonn (DE))
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13:00
Lunch Break 30/7-018 - Kjell Johnsen Auditorium
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Session 9: Calorimeters 30/7-018 - Kjell Johnsen AuditoriumConvener: Francesco Lanni (Brookhaven National Laboratory (US))
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CMS EB FE + HB including combined back-endSpeaker: Marc Dejardin (CEA/IRFU,Centre d'etude de Saclay Gif-sur-Yvette (FR))
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ATLAS Back endSpeaker: Fernando Carrio Argos (Instituto de Fisica Corpuscular (ES))
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Poster 30/7-018 - Kjell Johnsen Auditorium
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16:00
Tea Break 30/7-018 - Kjell Johnsen Auditorium
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Session 10: Muon systems 30/7-018 - Kjell Johnsen AuditoriumConvener: Anna Colaleo (Universita e INFN, Bari (IT))
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Overall CMS talk presenting the different systemsSpeaker: Ignacio Redondo Fernandez (Centro de Investigaciones Energ. Medioambientales y Tecn. - (ES)
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CMS FE electronics replacement (DT mini-crate upgrade; CSC consolidation)Speaker: Benjamin Glenn Bylsma (Ohio State University (US))
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CMS MPGD + fast timing detector + multi-gap RPC R&D with emphasis on electronicsSpeaker: Herve Mathez (Universite Claude Bernard-Lyon I (FR))
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Overall ATLAS talk presenting the different systemsSpeaker: Oliver Kortner (Max-Planck-Institut fuer Physik (Werner-Heisenberg-Institut) (D)
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ATLAS New small wheelsSpeaker: Junjie Zhu (University of Michigan (US))
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ATLAS Phase 2Speaker: Markus Fras (Max-Planck-Institut fuer Physik (Werner-Heisenberg-Institut) (D)
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Workshop Dinner
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Information for Dinner 30/7-018 - Kjell Johnsen Auditorium
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Session 11: Trigger electronics 30/7-018 - Kjell Johnsen AuditoriumConvener: Oliver Kortner (Max-Planck-Institut fuer Physik (Werner-Heisenberg-Institut) (D)
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Phase 1 CMS upgradeSpeaker: Prof. Dave Newbold (University of Bristol (GB) / Rutherford Appleton Laboratory (GB))
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Phase 1 ATLAS upgradeSpeaker: Stefano Veneziano (Universita e INFN, Roma I (IT))
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Combining tracker, calorimeter and muon informationSpeaker: Emmanuel Francois Perez (CERN)
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Phase 2 ATLAS upgradeSpeaker: David Sankey (STFC - Rutherford Appleton Lab. (GB))
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10:45
Coffee Break 30/7-018 - Kjell Johnsen Auditorium
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Session 12: DAQ and DCS 30/7-018 - Kjell Johnsen AuditoriumConvener: Magnus Hansen (CERN)
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LHCb PCIe developmentSpeaker: Jean-Pierre Cachemiche (Centre National de la Recherche Scientifique (FR))
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Wrap-up of ACESSpeaker: Magnus Hansen (CERN)
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