11th International "Hiroshima" Symposium on the Development and Application of Semiconductor Tracking Detectors (HSTD11) in conjunction with 2nd Workshop on SOI Pixel Detectors (SOIPIX2017) at OIST, Okinawa, Japan

10 Dec 2017, 08:00 → 15 Dec 2017, 17:30 Japan

Conference Center (Okinawa Institute of Science and Technology Graduate University (OIST))

Conference Organizers (KEK)

Submission of paper: Formal submission has ended (on 5 March, 2018).

For late submission due to "force majeure", please contact the organizer/editor of the conference.

(The submission page is ready. Log-in and select the "Article Type", SI: NIMA-HSTD 2017, to submit your manuscript to the editorial system.)

    

This year's "Hiroshima" Symposium (HSTD) is co-organized with the Workshop on SOI Pixel Detector (SOIPIX), to benefit from shared human and research resources. The venue is the island of Okinawa, and will be held at the Auditorium of the Okinawa Institute of Science and Technology Graduate University (OIST), with strong support from the institute.

True to tradition, the primary goal of the "Hiroshima" Symposium is to bring experts in design, processing, and applications of semiconductor tracking detectors together for discussions of experiences, lessons learned, and new ideas which are still in the early stage of development.

SOIPIX is an innovative radiation and imaging detector using a new semiconductor technology, Silicon-On-Insulator (SOI) multi-layer wafer. The SOI technology enables us to realize a 3D sensor where sensor layer and readout electronics layer are bonded in a truly monolithic way, which will open up new frontiers of particle and nuclear physics, astrophysics, material and life science with quantum beam imaging.  

Key dates:

10 July — 28 Aug   Submission of Abstracts
10 July — 9 Oct (Early) — 20 Nov   Online Registration
11Dec —15 Dec   Conference
1 Jan — 5 Feb, 2018   Submission of NIMA manuscripts

 

171212groupPhoto.JPG

Announcement_HSTD11_SOIPIX2017_R1.pdf

ConferenceKit.zip

First_Circular_R1.pdf

HSTD11-SOIPIX2017_Tours_20171113.pdf

HSTDSOIPIX_poster_v3.6.5_A2_0714_trim.pdf

LastMinutesCircular.zip

Second_Circular_R2.pdf

Sunday 10 December

17:00 → 18:00 Preparation meetings

18:00 → 20:00 Welcome party: On-site registation

OceanViewDomeDirection.pdf

20:00 → 22:00 POSTER: Virtual slot to list the posters. Poster sessions are during/using the coffee/tea/lunch breaks from Monday to Thursday. Poster size (max.): A0 (841x1189 mm^2) in portlait.

171204_Poster#.pdf

20:00 Study of Silicon drift sensor for Gamam-ray Compton Camera

Compton camera used in the Hitomi SGD is a useful detector for soft gamma-ray in space observation. Si-pixel sensor with 3.4 mm pixe;s are used as scatterer in the SGD Compton camera. But this pixel size does not allow us to measure a direction of Compton-recoil electrons in the Si sensor, and thus the sensitivity is limited. To improve, it is important to measure the direction of recoil electrons and constrain the incoming direction of photons to a part of Compton ring. It is an advantage to use silicon drift sensor for this point. Silicon drift sensor has a strip-like readout channels and a drift time of signal electrons gives information of hit positions in another axis. There are three advantages compared with si-pixel sensor. One is that high position resolution are expected by measuring drift time and a smaller channel pitch. The second is that high energy resolution is expected by smaller capacitance. The third is that a low power consumption due to a smaller numbers of readout channels. Low power consumption is very important for satellite.
We made the prototype silicon drift sensor whose size is 1846.50.5 mm^3 and 64 readout channels and 0.1*0.07 mm^2 channel size with Hamamatsu Photonics. We confirmed that the X-ray energy of 59.5 keV can be measured with this sensor. In this poster, we will report the results of the basic experiments on this sensor.

Speaker: Mr Fumiya Imazato (Hiroshima university)

HSTD11.pdf

HSTD11.pptx

20:01 Fabrication of silicon-supported germanium blocked impurity band detectors for infrared astronomy

Far infrared(FIR) wavelength (30 - 200 $\mu$m) is important spectral window to study the formation of planets, stars and galaxies. Germanium Blocked Impurity Band (Ge BIB) detectors respond sensitively to FIR photons of those wavelengths, which have cut-off wavelength significantly longer than Ge photoconductors without applying mechanical stress. Ge BIBs are consisting of an IR active layer, Ge:Ga with Ga concentration high enough to form an impurity band, and a blocking layer, high-purity Ge to block the impurity band conduction of active layer. Thicknesses of both layers are
approximately 5 $\mu$m and they are mechanically supported on a thick (500 $\mu$m) and IR transparent Si substrate.
We develop the detector chips composed of Ge BIBs and readout integrated circuits (ROICs) made of fully-depleted silicon-on-insulator (FD-SOI). The Ge BIB is mounted on the ROIC by nano-particle deposition (NpD) Au-bump bonding.
The detector chips are operated under a cryogenic temperature such as 2 K. In this environment, difference in the coefficient of thermal expansion (CTE) between Ge-based BIB detectors and Si-based ROICs generates stress on Au-bump which connects them mechanically and electrically. In this study, the Si-supported Ge BIB structure is employed to overcome this problem. CTE of the Si-supported structure composed of thick Si with two thin Ge layers is expected to be dominated by the Si substrate. Therefore, the thermal stress due to CTE mismatch between Ge BIB and Si ROIC is mitigated.
Si-supported Ge BIB wafers are fabricated by using room-temperature surface-activated bonding (SAB) technique as well as grinding and chemical mechanical polishing technique. Further, the wafers are processed into BIB detectors which have a 32x32 or 5x5 pixel array.
In this presentation, the current status of the fabrication of Si-supported Ge BIB detectors will be reported.

Speaker: Takahiro ISHIIMARU (Japan Aerospace Exploration Agency)

【印刷版】SOIPIX2017_poster.pdf

20:02 Pixelated CdZnTe detector based on Topmetal-IIa sensor

Topmetal-II- is a direct-charge collecting pixel sensor with the Equivalent Noise Charge(ENC) of 13.9e- in the room air. A pixelated CdZnTe detector based on Topmetal-II- sensor works at a low bias voltage of -2V due to leakage current saturation. In order to improve the bias voltage of the crystal to achieve higher spatial resolution, as well as to keep the low noise, Topmetal-IIa has been designed. The new sensor has the same array scan module with Topmetal-II-, but three different sections of the charge-collection electrode named Topmetal and the same layer metal surrounding the electrode called Guardring. Section A has the opening exposed electrode and the Guardring covered by insulating layer, which is the same as Topmetal-II-. Section B has the both opening exposed electrode and Guardring. Section C has the opening exposed Guardring and the electrode covered by insulating layer. Preliminary experiments show that Topmetal-IIa sensor has low ENC similar to Topmetal-II-, and the pixelated CdZnTe detector could work with Topmetal-IIa sensor could work at a bias voltage up to several hundred volts as to achieve high spatial resolution.

Speaker: Ms Yan Fan (Central China Normal University)

Pixelated CdZnTe detector based on Topmetal-IIa sensor.pdf

Pixelated CdZnTe detector based on Topmetal-IIa sensor.pptx

20:03 Process Quality Control of Large-Scale Silicon Sensor Productions for Future HEP Experiments

Silicon sensors for applications in tracking and calorimetry for HL-LHC experiments will enter the series production stage in just a few years. To ensure the quality and stability of the manufacturing process, critical parameters must be monitored throughout sensor production. Important properties are measured directly on the sensors, but many process indicants cannot reasonably be studied on the real devices. Thus, a large part of process quality control is performed on small test-structures that are located on the empty parts of the wafer around the main sensor. For example, the expected properties of sensors exposed to high radiation doses in HEP experiments can be deduced directly from measurements of non-irradiated test-structures.

The presented work aims to optimize measurement techniques as well as test-structure layout to facilitate adequate monitoring of the process quality and provide extensive diagnostic tools to trace arising problems. We study different methods to extract critical process parameters like the full depletion voltage, bulk resistivity, doping concentration, and oxide charge concentration on non-irradiated p-type semiconductor devices. We look at ways to improve the performance and precision of measurement techniques using standard test-structures like diodes and MOS capacitors. Additionally, we study the reduction of test-structure size. Some process indicants cannot be measured with sufficient accuracy, if the corresponding test-structures become too small. We investigate this effect and look at ways of measuring sensitive parameters like the interstrip resistance on alternative, smaller test-structures. Conclusively, we present the compared results of the varying methods and give a first lookout on optimized process quality control for the upcoming HL-LHC sensor series production.

Speaker: Ms Viktoria Hinger (Austrian Academy of Sciences (AT))

ViktoriaHinger_HSTD11_final.pdf

20:04 The Impact of Incorporating Shell-corrections to Energy Loss in Silicon

Modern tracking detectors based on hybrid or fully integrated CMOS technology are continuing to push to thinner sensors. The energy fluctuations in very thin silicon sensors significantly deviates from the Landau distribution. Therefore, we have developed a digitization setup that implements the Bichsel straggling function, which accounts for shell-effects. This enhanced simulation is important for comparing with testbeam or collision data with thin sensors as is demonstrated by a significant degradation in the position resolution compared with the standard Geant4 EM physics list. Our implementation of the Bichsel model agrees well with the multipurpose photo absorption ionization (PAI) model in Geant4 and is significantly faster. The code is made publicly available as part of the Allpix software package in order to facilitate predictions for new detector designs and comparisons with testbeam data.

Speaker: Ms Fuyue Wang (Tsinghua University)

ShellCorrection.pdf

20:05 Signal simulation under the bias rail in n^+-in-p pixel sensors before and after irradiation

We have developed novel radiation-tolerant n^+-in-p pixel sensors with biasing network from the outer bias ring to individual pixels. The network is to provide the reverse bias voltage to individual pixels, made of bias rails passing through columns of pixels and bias resistors branching from the rail to individual pixels. The biasing network enables to verify the high voltage operation of individual pixels for quality control for identifying the sensors having defective pixels, e.g. having the microdischarge at a lower bias voltage. The pixel sensors were gone though beamtests for measuring track finding efficiency in pixel in detail, before and after radiation damage by protons. The device showed little efficiency loss, initially, before irradiation. After irradiation, the same device/geometry showed efficiency loss, especially under the bias rail, noticeably. In order to understand the underlying physics, we have developped a Monte Carlo signal simulation program with the standard procedures of Ramo's potential and drifting carriers. In this signal simulation, we have imported distributions of the electric fields and the weighting potentials in high precision from TCAD calculations. We have evaluated the charges lost to the bias rail with and without radiation damage. The comparison has confirmed the efficiency loss quantitatively and the insight into the underlying physics.

Authors: Y. Unno, R. Hori, and ATLAS-Japan Silicon Collaboration

Speaker: Yoshinobu Unno (High Energy Accelerator Research Organization (JP))

unno_poster_sigsim_R1.pdf

20:06 Dictionary-learning based image deblurring for improving performance in nondestructive testing

In conventional radiography, x-ray images are typically blurred, limiting the image performance of the system, mainly due to finite focal spot size of the x-ray tube, inherent the detector pixel size, and the detector resolution. Thus, the recovery of images from their degraded version is essential for improving the image characteristics. In this work, we investigated a dictionary-learning based image deblurring scheme for improving image performance in nondestructive testing (NDT), in which an x-ray image is represented as a form of patches and the patches are encoded with sparse coefficients using an overcomplete dictionary. The sparse constraints are able to recover the latent image from ill-posed deconvolution problem. Furthermore, the dictionary is learned from the updated image for encoding adaptive sparse constraints. Final deblurred image is iteratively obtained by using the sparse constraints with the learned dictionary to the updated image. We implemented the proposed algorithm and performed an experiment to demonstrate its viability. Our results indicate that the proposed deblurring method appears effective for improving the image characteristics in x-ray NDT.

Speaker: Mr Guna Kim (Department of Radiation Convergence Engineering, Yonsei University)

HSTD11_Poster_simulation07.pdf

20:07 Optimization of bias rail implementations for segmented silicon sensors

Bias rails are fundamental design features of segmented strip as well as pixelated silicon sensors in order to distribute the ground potential from the bias ring to the implants.
In case of AC coupled strip sensors, grounding the implants through the bias rail is essential to deplete the bulk during testing and operation.
Since DC coupled sensors are usually grounded through the virtual ground potential of their readout chip, bias rails open up the possibility to ground and test the sensor before assembly.
However, adding the bias rail is always accompanied with a certain degree of efficiency loss and modification of the electric field in that region which could result in an early breakdown of the sensor.

TCAD simulations provide a deeper insight into how electric fields in the bias rail region evolve and how charge is collected.
Varying parameters like strip isolation or the bias rail implementation itself, leads to an even better understanding of how the performance of silicon sensors depend on the chosen design parameters.

This contribution summarizes an extensive simulation study searching for an
optimal set of design parameters to minimize the breakdown voltage and maximize
the charge collection efficiency.
The results are complemented with test beam measurements performed at the
DESY test beam facility in Hamburg, Germany.

Speaker: Daniel Schell (KIT - Karlsruhe Institute of Technology (DE))

BiasRail.pdf

20:08 Simulation Study of a Pixelated Silicon Sensor on High Resistivity Integrated with Field Effect Transistor

We conceive the position sensitive pixelated silicon detector using the direct illumination of X-ray. Considering the detection efficiency we plan to use the detector for the relatively low energy X-ray. The absorption length of silicon around 10 keV is about 200~300 um, the active silicon thickness should be twice of the absorption length so that we consider a thickness of 525 µm n-type silicon with high resistivity.
The active volume of the detector is depleted by applying a negative bias voltage to the junction side. The X-ray illumination to the junction side produces electron-hole pairs in the active volume and the produced electrons are wept to the other side of the pixel detector and provides the position information of the conversion point. The cylindrical structure of JFET is employed as the switch to readout the charges accumulated in the pixels. When X-ray is illuminated to the detector, the switches in every pixel are open and the charges are transferred to the drain from the source of the FET. All pixels with one row are read in parallel and the next row is selected by the controlling voltage after finishing the reading one row. For this purpose the double metal structure is needed; the first metal layer for controlling gate voltage and the second metal layer for readout. The polyimide is served as the charge storage capacitor. A thick SiO2 layer between two metal layers separates from each other to insulate the second metal layer.
Figure 1 is a cross-sectional view of the pixelated silicon detector integrated with JFET switch. The deep p-well under the drain is implanted to prevent any signal electrons drifting directly toward the drain. On the other hand the N+ is implanted for the source and drain of the FET. The field shaper is introduced to isolate between pixels. We perform the simulation of the pixelated silicon position detector with JFET switch and present a characteristics of the transistor such as the drain current as a function of the voltage between the source and drain for the gate voltage, as shown in Figs. 2 and 3. We plan to develop the prototype of the detector shown in Fig. 4 on a very high resistivity integrated with an FET switch based on results of the simulations.

Figure 1: https://www.dropbox.com/s/3ocni3slw84o1h4/Figure1.jpg?dl=0
Figure 2: https://www.dropbox.com/s/4zhpc64rzcuqvt7/Figure2.jpg?dl=0
Figure 3: https://www.dropbox.com/s/655cowqne2xix4b/Figure3.jpg?dl=0
Figure 4: https://www.dropbox.com/s/azwjmstnehqrj6l/Figure4.jpg?dl=0

Speaker: Dr Hyeyoung Lee (Kyungpook National University)

20:09 TCAD simulation of Radiation Damage Effects on LHCb Velo and Operations in Run-II

The primary goal of the LHCb experiment at the LHC is to search for indirect evidence of new physics via measurements of CP violation and rare decays of beauty and charm hadrons. The VErtex LOcator (VELO) is a silicon-strip detector located around the interaction region. It has active sensing elements as close as 8 mm from the LHC beams, and for this reason it undertakes a very high radiation damage.

The non-uniform exposure of the VELO sensors makes it an ideal laboratory to study radiation damage effects in silicon detectors. The VELO sensors are exposed to fluences of the order of $5\times10^{13}$ 1-MeV neq/cm$^2$ per $fb^{-1}$, and it is planned to operate up to 10 $fb^{-1}$ integrated till the end of Run II. Several different methods are used to monitor the radiation damage. In particular, regular High Voltage scans are taken which allow a precise measurement of the Charge Collection Efficiency (CCE), and Cluster Finding Efficiency (CFE) as function of the applied voltage. These analyses are used to determine the operational voltages, and to monitor the degradation of the detector performance.

The detectors are constructed with two metal layers in order to cover the particular design of the R/$\phi$ strips and to route the signal to the outer region where the front-end chips are located. A loss of signal amplitude and hence efficiency has been observed with a strong dependency on the distance to the routing lines. A complete TCAD simulation was implemented with the full detector geometry in order to investigate these effects in detail. Using the Perugia n-type bulk model and the Peltola surface damage model it is shown that, for the worst case particle hit position and angle, up to 60% of the deposited charge is picked up by the routing lines. It is argued and shown in simulation that this is caused by trapping of the otherwise mobile electron accumulation layer at the oxide-silicon interface. As the inversion layer is trapped and made immobile, its shielding effect on the routing lines is removed. Additionally, it is found that the observed drop in CFE, which is largest in the outer radial regions of the sensors far away from the interaction point, can be explained by the angular dependence of charge loss to the second metal layer. By combining 2D and 3D simulations of up to five strips in TCAD with the global geometry of the sensors, efficiency drop as function of sensor radius and angle is qualitatively reproduced.

The overall performance of the VELO during Run-2 will be presented. The results of the latest high voltage scans will be shown, and measurements of the effective depletion voltage will be compared with the expected values that are calculated using the Hamburg model. Several fits to the model will be shown that illustrate different annealing scenarios, related to maintenance activities of the cooling system that are envisaged in Run-2, and their impact on the operation of the detector during the remaining Run-2 data taking. An explanation for the observed charge loss to the routing lines will be presented, backed up by the results from the simulation.

Speaker: Kazuyoshi Carvalho Akiba (Federal University of of Rio de Janeiro (BR))

20:10 Modeling the transient effects of 60Co γ rays in CIS imaging system by Monte Carlo method based on Geant4

CMOS image sensors (CISs) have lots of advantages such as low power consume, high integration, high TID radiation toleration et al. and become the main components of imaging system which is widely used in the 60Co γ rays source laboratory to monitored experiment process.
The objective of this work is to model the transient effects of 60Co γ rays in CIS imaging system. The CIS imaging system includes the separate board, evaluation board, shielding box, computer control system, lens, lens hold, and CIS et al. The evaluation board and separate sensor board are separated and connected by transmission circuit. The 60Co γ rays experiments are carried out at 60Co γ ray facility at Northwest Institute Nuclear Technology. The dose rates are calibrated by PTW-UNIDOS, and the dosimetry is accurate to better than 2.5%.
The Photoelectric effects, Pair effects and Compton scattering are considered in physics processes. The cross sections of each effect are calculated. The projected range and linear energy transfer of 60Co γ rays in Si and SiO2 are simulated. The ionizing dose distributions of the 60Co γ rays in Si and SiO2 along the radial direction are presented.
The simulation model of the CIS pixel is established according to the real pixel geometry, material and doping concentration. The pixel is composed of six layers. The layer of sensitive volume (SV) is where the charge collection happens. The transient effects of 60Co γ rays in the 100×100 CIS arrays are simulated. The simulated results are compared with the experimental results. The characteristics of transient effects induced by 60Co γ rays are analyzed.

Speaker: Mr Xue Yuanyuan ( Northwest Institute of Nuclear Technology)

20:11 3D-Si single sided sensors for the innermost layer of the ATLAS pixel upgrade

The LHC is expected to reach luminosities up to 3000 fb−1 and the innermost layer of the ATLAS upgrade plans to cope with higher occupancy and to decrease the pixel size. 3D-Si sensors are a good candidate for the innermost layer of the ATLAS pixel upgrade since they exhibit good performance under high fluences and the new designs will have smaller pixel size to fulfil the electronics expectations. Detectors located at large η angles, far from the interaction point, will receive the particles almost perpendicularly to the column. In order to have a more precise detection at those positions, thinner 3D detectors are proposed. In order to test different configurations, two possible types of wafers are proposed: a 150 μm p-type SOI wafer and 150 μm p-type SOI wafer with a p-type backside implant. The thickness of the active wafer can be reduced according to the requirement of the experiment.
In this poster, the Sentaurus TCAd simulation and the preliminary electrical results of 3D thin detectors fabricated at CNM will be presented. The simulations of new geometries with smaller pixel sizes show a good response without irradiation and their collected charge will decrease to less than half when they are irradiated with the expected fluences of 2 × 1016 neq /cm2. The 50 μm×50 μm geometry shows higher CCE than 100 μm×25 μm (1E) after irradiation, since the distance to the electrodes is smaller and therefore the drifting distances are shorter and the generated electron–hole pairs have less probability of trapping

Speaker: Dr Giulio Pellegrini (Centro Nacional de Microelectrónica (IMB-CNM-CSIC) (ES))

Poster_Hiroshima_pellegrini.pdf

20:12 Development of highly compact digital pixels for the vertex detector of the future e+e- collider

Precise determination of the charged particle tracks and reconstruction of the primary and displaced decay vertices always drive the need for a high precision vertex detector for future electron-positron collider experiments. Such vertex detector should be constructed with pixel detectors with high spatial resolution and low material budget, and fast readout to keep the detector occupancy low. CMOS pixel sensor (CPS) with pixel level discrimination represents one of the most promising candidates. However, the complexity of in-pixel digital circuit always leads to increased pixel size, which is disfavored to obtain high spatial resolution.
Recent developments have demonstrated that depleted Monolithic Active Pixel Sensors (MAPS) could bring in more advantages to charged particle tracking compared to conventional MAPS, such as lower sensing point equivalent capacitance and higher signal collection efficiency. In this context, we propose two highly compact digital pixel structures, based on the advantageous depleted MAPS concept, which shall lead to improved spatial resolution.
The two structures with balance between high precision and circuit simplicity guarantee compact pixels, yet with satisfying high signal over noise ratio. Prototype with these two highly compact structures, with a pixel pitch size of 22 μm, has been designed with a 0.18 μm CMOS Image Sensor process. It contains 112×96 pixels, covering an area of 3 mm×3.3 mm. The prototype will operate in the rolling-shutter mode, with expected processing speeds of 100ns/row and 80ns/row, respectively, for the two proposed structures.

Speaker: Dr Yang Zhou (Institute of High Energy Physics Chinese Academy of Sciences)

11TH HSTD_POSTER.pdf

20:13 Ultimate position resolution of pixel clusters with binary readout for particle tracking

Silicon tracking detectors can record the charge in each channel (analog or digitized) or have only binary readout (hit or no hit). While there is significant literature on the position resolution obtained from interpolation of charge measurements, a comprehensive study of the resolution obtainable with binary readout is lacking. It is commonly assumed that the binary resolution is pitch/sqrt(12), but this is generally a worst case upper limit. In this paper we study, using simulation, the best achievable resolution for minimum ionizing particles in binary readout pixels. A wide range of incident angles and pixel sizes are simulated with a standalone code, using the Bichsel model for charge deposition. The results show how the resolution depends on angles and sensor geometry. Until the pixel pitch becomes so small as to be comparable to the distance between energy deposits in silicon, the resolution is always better, and in some cases much better, than pitch/sqrt(12).

Speaker: Ms Fuyue Wang (Tsinghua University)

Binary.pdf

20:14 A Monolithic Active Pixel Sensor prototype for the CEPC vertex detector

The Circular Electron Positron Collider (CEPC) is proposed as a Higgs factory to measure the Higgs boson precisely. The CEPC vertex detector requires a low material budget, a high spatial resolution, a fast readout and a low power consumption. Monolithic Active Pixel Sensor (MAPS) will be the most promising candidate which can most likely satisfy the requirements simultaneously. For the R&D of the CEPC vertex detector, we have developed a prototype MIC4 in the Towerjazz 180 nm CMOS Image Sensor (CIS) process. Two different binary front-end circuits have been implemented inside MIC4 to study their different performances. The power consumption of the front-end is about 35nW/pixel. A new architecture of asynchronous zero-suppression data-driven readout inside the matrix has been implemented. The matrix contains 128 rows and 64 columns with a small pixel pitch of 25 μm. The readout speed is 40MHz/hit and the readout time depends on the hit occupancy. The data is encoded and read out at 1.2Gbps using a SPI interface. The on chip DACs and LVDS transceivers are also implemented. This work presents the design of the prototype, which is in the progress of fabrication and expected to be characterized in the early 2018.

Speaker: Dr Ying ZHANG (Institute of High Energy Physics, CAS, China)

P15_ZY_POSTER_Final.pdf

20:15 Investigation of modified ATLAS pixel implantations

The innermost tracking detector of the ATLAS experiment consists of planar n-in-n silicon pixel sensors. Closest to the beam pipe lies since the phase-0 upgrade the insertable b-layer (IBL). Its pixels are arranged in a pitch of $250\,\mu$m$\,\times\,50\,\mu$m, with a rectangular shaped n-implant.
Based on this design modified pixel designs have been developed in Dortmund.

The new pixel designs are arranged in structures of ten columns and have been placed besides structures with the standard design on one sensor. Because of a special guard ring design, each structure can be powered and investigated separately. Several of these sensors have been bump bonded to FE-I4 read-out chips. One of these modules has been irradiated with reactor neutrons up to a fluence of $5 \times 10^{15}\, \text{n}_{\text{eq}}\text{cm}^{-2}$.

This contribution presents important sensor characteristics, charge collection determined with radioactive sources and hit efficiency measurements, performed in laboratory and test beam, of this irradiated device. This results are compared with the results of non-irradiated devices.

In addition, an outlook is given to first measurements of a device irradiated with protons as well as of a new sensor with five follow-up designs, which had been placed on a recently finished R\&D production.

Speaker: Andreas Gisen (Technische Universitaet Dortmund (DE))

HSTD11_AGisen.pdf

20:16 Performance of CMOS pixel sensor prototypes in AMS H35 and aH18 technology for the ATLAS ITk upgrade

Pixel sensors based on commercial high-voltage CMOS processes are an exciting technology that is considered as an option for the ATLAS inner tracker upgrade. Here, particles are detected using deep n-wells as sensor diodes with the depleted region extending into the silicon bulk. Both analog and digital readout electronics can be added to achieve different levels of integration up to a fully monolithic sensor. Small scale prototypes using the AMS technology have previously demonstrated that it can in-principle achieve the required radiation tolerance above 10$^{15}$ neq/cm$^{2}$ and detection efficiencies above 99%. Recently, large area prototypes, comparable in size to a full sensor, have been produced that include most features required towards a final design: the H35demo prototype produced in AMS H35 technology that supports both external and integrated readout and the monolithic pATLASPix1 pre-production design produced in AMS aH18 technology. Both chips are based on large fill-factor pixel designs, but differ in readout structure. We will show systematic performance results for H35demo with capacitively-coupled external readout using TCT and testbeam measurements as well as first results for the monolithic pATLASPix1.

Speaker: Moritz Kiehn (Universite de Geneve (CH))

20171211-msmk-ams_cmos_pixel.pdf

20:17 New Readout Strategies of CMOS Pixel Sensors Dedicated for High Energy Physics Experiments

CMOS pixel sensors have demonstrated high detection efficiency, high resolution, low material budgets, low costs, and potentially good radiation tolerance, high speed and low power consumption for the particle tracking in high energy physics experiments. In this paper, we report a study of some new readout strategies that reducing the signal readout times of CPS for the possibility of increasing the readout speed and reducing the power consumption. Firstly, owing to the sparsity of the particle imaging in high energy physics experiments, Compressive Sensing theory is applied. Considering the hardware implementation, the observation matrix is applied for the signals in a column and the column signals are parallel read out. Observation matrix similar with Bernoulli matrix and Orthogonal Matching Pursuit algorithm are used for the sampling and the image reconstruction, respectively. The simulation results indicate the particle images can be well reconstructed with less than 100 times of samplings for either analogue pixels or digital pixels in a matrix of 1024×1024 during 100 frames of various input particle images. The maximal absolute error is in order of $10^{-12}$. Secondly, we are enlightened by the idea of Compressive Sensing and propose to read out the digital pixel signals with a binary search algorithm. The simulation results indicate all the nonzero data can be found in less than 100 times of readouts for various input particle images of 1024×1024 pixels. In one word, the readout strategies of both compressive sensing and binary search algorithm can reduce the readout times sharply comparing with the mature rolling-shutter readout. The CPS chips with these new readout strategies are under design. The readout speed and the power consumption will be evaluated in the future. In addition, the readout times could be reduced in advance by applying an observation matrix for the whole pixel matrix, then the hardware chip design will be the crucial problem.

Speaker: Dr Xiaomin WEI (Northwestern Polytechnical University)

P18_Hiroshima2017¥Hiroshima2017_xmwei_CS.pdf

20:18 A simulation system for signal readout of CMOS pixel sensors in high energy physics experiments

Since the successful application in STAR experiment, CMOS pixel sensors (CPSs) are preferred to be used in some other high energy physics experiments such as ALICE, CEPC and so on for particle tracking due to the low cost and potentially high performance. In order to achieve extreme high readout speed and low power consumption, many researches are focused on data sparsification and data compression during the signal readout. For example, the pixel signals in the Orthopix chips are projected in four directions for reducing the signal readout times. In the ALPIDE chips, the pixel signals are only read out when it is true. Different with the traditional CPS chips, in which each pixel signal is indistinguishably processed, the signal processing in such chip may be different between frames due to the random input particle images induced by the impinging particles. The signal reconstruction in the Orthopix design and the readout data volume in the ALPIDE design are related with the input particle images. A simulation system with proper input particle images will be helpful for designing, optimizing and verifying the readout strategies and evaluating the design performances like the efficiency of the image reconstruction and the readout speed. In this paper, we present an efficient simulation system for CPS and its applications on simulating the Orthopix design and the ALPIDE design. The proposed simulation system generates amounts of input particle images according the imaging characteristics in high energy physics experiments and evaluates the signal readout times and the data reconstruction efficiency. The detection efficiency of the Orthopix design is simulated with various images of different signal cluster sizes, signal distribution and signal occupancy for obtaining the proper projection directions and the signal threshold that adjusting the cluster size. The detection efficiency from the simulation results is consistent with that from the beam test. The readout times of the ALPIDE design are simulated with various images and the readout speed can be derived by considering the maximal readout times. In one word, the proposed system demonstrates good efficiency on simulating the readout procedures of CPS. The simulation systems can also be utilized to study and design other readout strategies of CPS for particle tracking.

Speaker: Mr Bo LI

P19_Hiroshima2017¥Hiroshima2017_xmwei_Simulation_new.pdf

20:19 Development of pixel modules for the forward region of the ATLAS Tracker Upgrade

The assembly and results from testing of pixel modules for the forward regions of the ATLAS Tracker Upgrade will be presented. Sensors have been developed for the ATLAS FE-I$ readout chip. Different bump-bonding methods have been investigated and the results of the bump-bonding yields determined from electrical measurements will be presented. The hybrid flex design and its assembly to the bump-bonded pixel module will be described. Results from the electrical tests of the assembled pixels before and after thermal cycling will be given. The interfaces to the electrical services will be discussed, particularly those to the 5Gbps links.

Contributing Author: Craig Buttar, University of Glasgow

Authors: R.L.Bates, P.J.Dervan, I.Tsurin, K.Arndt, D.Bortoletto, R.Plackett, W.Cunningham, K.Wraight, S.Naik, L.Flores, J.Pater, F.Munoz-Snachez, J.Stuart, S.Eisenhardt

Speaker: Craig Buttar (University of Glasgow (GB))

ATLAS_Upgrade_Pixels_final.pdf

20:20 Cadmium Telluride (CdTe) X-ray detectors with different passivation dielectrics

We report a fabrication process and characterization of detectors made of bulk Cadmium Telluride (CdTe) crystals. Prior the processing the quality and defect density in CdTe material was characterized by infrared (IR) spectroscopy. The chip-scale semiconductor detector and related interconnection processing was carried out in clean room premises of Micronova center in Espoo, Finland. We have compared low temperature passivation layer processes of aluminum oxide (Al2O3) Atomic Layer Deposition (ALD) and sputtered aluminum nitride (AlN). The metallizations of detectors were made by titanium tungsten (TiW) metal sputtering depositions and an electroless Nickel growth. The CdTe crystals the size of 10 × 10 × 0.5mm3 were patterned with proximity-contactless photo-lithography techniques. The detector properties were characterized by IV-CV and Transient Current Technique (TCT) methods. The active edge sensitivity of detectors passivated by AlN or Al2O3 was especially emphasized in this study.

Speaker: Mrs Akiko Gädda (Senior Researcher)

okinawa-poster(final).pdf

20:21 Radiation damage status of the ATLAS silicon strip detectors

The Silicon microstrip detector system (SCT) of the ATLAS experiment at LHC has been working well for about 10 years since 2008. The innermost layer has already received a few times of 1013 1-MeV neutron-equivalent fluences/cm2. The evolutions of the radiation damage effects on strip sensors such as leakage current and full depletion voltages will be presented.

Speaker: Taka Kondo (High Energy Accelerator Research Organization (JP))

HSTD11_v2_A3.pdf

20:22 Studying signal collection in the punch-through protection area of a silicon micro-strip sensor using a micro-focused X-ray beam

on behalf of the ATLAS ITk strip sensor working group.

For the Phase-II Upgrade of the ATLAS detector, a new, all-silicon
tracker will be constructed in order to cope with the increased track den-
sity and radiation level of the High Luminosity Large Hadron Collider.
While silicon strip sensors are designed to minimise the fraction of
dead material and maximise the active area of a sensor, concessions must
be made to the requirements of operating a sensor in a particle physics
detector. Sensor geometry features like the punch-through protection de-
viate from the standard sensor architecture and thereby affect the charge
collection in that area.

In order to study the signal collection of silicon strip sensors over their
punch-through-protection area, ATLAS silicon strip sensors were scanned
with a micro-focused X-ray beam at the Diamond Light Source. Due to
the highly focused X-ray beam (2 × 3 μm) and the short average path
length of an electron after interaction with an X-ray photon (≤ 2 μm),
local signal collection in different sensor areas can be studied with high
resolution.

This study presents results of highly detailed 2D-scans of the punch-
through protection region of ATLAS silicon micro-strip sensors, showing
how far the strip signal collection area extends toward the bias ring and
how the region is affected by radiation damage.

Speaker: Luise Poley (Deutsches Elektronen-Synchrotron (DE))

PTPregion_LPoley.pdf

20:23 Investigation of the impact of mechanical stress on the properties of silicon strip sensors

on behalf of the ATLAS ITk strip sensor working group.

The new ATLAS tracker for phase II will be composed of silicon pixel and strip sensor modules. The strip sensor module consists of silicon sensors, boards and readout chips. Adhesives are used to connect the modular components thermally and mechanically. It was shown that the silicon sensor is exposed to mechanical stress, due to temperature difference between construction and operation.

Mechanical stress can damage the sensor and can change the electrical properties. The thermal induced tensile stress near to the surface of a silicon sensor in a module was simulated and the results are compared to a cooled module. A four point bending setup was used to measure the maximum tensile stress of silicon detectors and to verify the piezoresistive effects on two recent development sensor types used in ATLAS (ATLAS07 and ATLAS12). Changes in the inter-strip, bulk and bias resistance and capacitance as well as the coupling capacitance and the implant resistance were measured. The Leakage current was observed to decrease by bending. The surface and bias resistance was measured to increase for tensile stress along the strip direction and compressive stress perpendicular to the strip direction. These changes influence the noise which are quantified in signal measurements with a beta source.

Speaker: Martin Stegler (Deutsches Elektronen-Synchrotron (DE))

Hiroshima.pdf

20:24 Testbeam results on pick-up in sensors with embedded pitch adapters

For silicon strip sensors, the tracking information specifications can lead to challenging requirements for wire bonding. A common strategy is to use external pitch adapters to facilitate this step in the production of detector modules. A novel approach previously discussed in this publication, is to implement the pitch adapters in the sensor, by embedding a second layer of metal tracks. The use of these embedded pitch adapters (EPAs) decouples the bond-pad layout of the sensor from its implant layout by moving the adaption to the sensor production step. This solution, however, can yield the risk of performance losses due to the increase of inter-strip capacitance, or unwanted capacitive coupling between the metal layers (cross-talk) or the silicon bulk and the second metal layer (pick-up).

In the prototyping stage of the ATLAS tracker end-cap upgrade, where different bond-pad layouts on sensor and readout chip lead to extremely challenging wire-bonding conditions, sensors with different geometries of EPA implementations have been produced at Centro Nacional de Microelectrónica (IMB-CNM, CSIC), Barcelona, Spain. In order to study the influence of the EPA on the sensor performance, these sensors, built into a prototype detector module, were investigated in an x-ray beam. In this contribution, results of a study on the pick-up phenomenon in sensor regions with a high density of second-metal-layer tracks are presented. The performed measurements were taken in 15 µm by 10 µm steps with a micro-focussed 15 keV photon beam which allows resolution of the details of the EPA geometry.

The amount of signal degradation in primary strips in the presence of second-metal tracks as well as the size of the pick-up-induced signal in the deployed test setup are quantified. Recommendations regarding the geometry of the embedded pitch adapter are given, resulting in limits and opportunities for future applications.

Speaker: Laura Rehnisch (Humboldt University of Berlin (DE))

HSTD11_PickUp_final.pdf

20:25 Study of n-on-p sensors breakdown in presence of dielectrics placed on top surface

The ATLAS Experiment at LHC will have several upgrade projects for High Luminosity LHC operations. Its tracking system will be replaced to cope with the higher interaction rate and radiation levels. The Strip portion of the tracker will be significantly expanded in radius and instrumented area to control the occupancy and momentum resolution. The strip modules are based on large-area n-on-p sensors with short strips, designed to work with the larger particle fluxes and radiation hardness requirements.

The strip module design has readout flex circuit glued directly on top of the sensors’ active area to facilitate the assembly process and minimize the radiation length. Adhesive spread outward to the guard ring (GR) region is typically avoided to control the sensor breakdown. However, due to the large number of modules to be constructed, on the order of 20000, such occasions may in principle happen, depending on the process precision control. Therefore, the adhesive influence on the sensor breakdown and the breakdown mechanism are of interest.

In this contribution we report on the studies of the breakdown behavior with prototype sensors, where adhesives were placed on top of the sensor, either directly in the GR region, or in the active area far away from it. Several adhesives under consideration for module building were used in these measurements. In additional tests, non-shrinking dielectrics were placed on top of the sensors in order to check the influence of mechanical stress created by glue shrinkage during curing. The measurements after thermo-cycling were also performed.

Speaker: Vitaliy Fadeyev (University of California,Santa Cruz (US))

HSTD11-Glues-on-Sensors_2017_v3a.pdf

20:26 Design of the first full size ATLAS ITk Strip sensor for the endcap region

The ATLAS collaboration is designing the full silicon tracker (ITk) that will operate in the HL-LHC replacing the current design. The silicon microstrip sensors for the barrel and the endcap regions in the ITk are fabricated in 6 inch, p-type, float-zone wafers, where large-area strip sensor designs are laid out together with a number of miniature sensors. The radiation tolerance and specific system issues like the need for slim edge of 450 µm have been tested with square shaped sensors intended for the barrel part of the tracker. This work presents the design of the first full size silicon microstrip sensor for the endcap region with a slim edge of 450 µm. The strip endcaps will consist of several wheels with two layers of silicon strip sensors each. The strips have to lie along the azimuthal direction, apart from a small stereo angle rotation (20 mrad on each side, giving 40 mrad total) for measuring the second coordinate of tracks. This stereo angle is built into the strip layout of the sensor and, in order to avoid orphan strips, the sensor edges are inclined by the stereo angle. On top of this, the top and bottom edges are designed as arcs to have equal length strips. Together with the design of this new "Stereo Annulus" sensor, we will report on the initial measurements of the leakage current as a function of bias voltage, after dicing, and the resistivity of the wafers.

Carlos Lacasta, Nigel Hessey* and Yoshinobu Unno
on behalf of the ATLAS ITk Strip Sensor Working Group

*Now at TRIUMPF, Vancouver, Canada

Speaker: Carlos Lacasta Llacer (IFIC-Valencia)

HSTD11-Lacasta-2017.pdf

20:27 Assembly and Electrical Tests of the First Full-size Forward Module for the ATLAS ITk Strip Detector

The ATLAS experiment will replace the existing Inner Detector by an all-silicon detector named the Inner Tracker (ITk) for the High Luminosity LHC upgrades. In the outer region of the Inner Tracker is the strip detector, which consists of a four layer barrel and six discs to each side of the barrel, with silicon-strip modules as basic units. Each module is composed of a sensor and one or more flex circuits that hold the read-out electronics. In the experiment, the modules are mounted on support structures with integrated power and cooling. The modules are designed with geometries that accommodate the central and forward regions, with rectangular sensors in the barrels and wedge shaped sensors in the end-caps. The strips lengths and pitch sizes vary according to the occupancy of the region.

In this contribution, we present the construction and the results of the electrical tests of the first full-size module of the innermost forward region, named Ring 0 in the ATLAS ITk strip detector nomenclature. This module uses a sensor with stereo annulus geometry, having four segments of strips of different lengths and pitch. The read-out of the strips is achieved through dedicated ASICs mounted on two hybrid boards, with 8 and 9 chips. The two innermost strips segments are read out through 8 chips, for a total of 2048 strips, while the two outermost segments are read out through 9 chips, for a total of 2304 strips. We introduce the assembly procedure that lead to the construction of the module as well as the testing during the intermediate steps.

Speaker: Carlos Garcia Argos (Albert-Ludwigs-Universitaet Freiburg (DE))

HSTD-R0_Module_Building.pdf

20:28 Prototype Strip Barrel Modules for the ATLAS ITk Strip Detector

The module design for the Phase II Upgrade of the new ATLAS Inner Tracker (ITk) detector at the LHC employs integrated low mass assembly using single-sided flexible circuits with readout ASICs and a powering circuit incorporating control and monitoring of HV, LV and temperature on the module. Both readout and powering circuits are glued directly onto the silicon sensor surface resulting in a fully integrated, extremely low radiation length module which simultaneously reduces the material requirements of the local support structure by allowing a reduced width stave structure to be employed.

Such a module concept has now been fully demonstrated using so-called ABC130 and HCC130 ASICs fabricated in 130nm CMOS technology to readout ATLAS12 n+-in-p silicon strip sensors. Low voltage powering for these demonstrator modules has been realised by utilising a DCDC powerboard based around the CERN FEAST ASIC. This powerboard incorporates an HV multiplexing switch based on a Panasonic GaN transistor. Control and monitoring of these modules is implemented via the so-called Autonomous Monitor and Control (AMACv1a) ASIC fabricated in 130nm CMOS technology. All the lessons learnt during the demonstration of such modules are being carried forward to the design and implementation of the final chipset for the ITk strip detector, ABCstar, HCCstar and AMACv2.

In this contribution, we will discuss the development and design of such low mass integrated modules for use in the barrel region of the ATLAS strip detector and track the pit-falls and successes along the way. In addition, we will show the first results for such modules after they have been attached to the local support structure. Finally, we will outline the way forward towards the final module and detector design.

Speaker: Peter Phillips (STFC - Rutherford Appleton Lab. (GB))

HSTD_Modules6.pdf

20:29 Gotthard-II: A ultra-fast Silicon Microstrip Detector with on Chip digital Image Memory

Gotthard-II is a microstrip detector developed for XFEL.EU. The applications include but are not limited to: energy dispersive experiments at 4.5 MHz frame rate, and veto signal generation. In Gotthard-II a silicon microstrip sensor with a pitch of 50 μm or 25 μm is wire-bonded to the readout ASICs. The ASIC is implemented with adaptive gain pre-amplifiers (PA), Correlated-Double-Sampling (CDS) amplifiers, 12-bit 20MS/s Analog-to-Digital Converters (ADC) and Static Random-Access Memory (SRAM) for storing all 2700 images in an XFEL bunch train.

Several prototype designs of the analogue front-end (PA + CDS) and ADC have been fabricated in UMC 110nm CMOS technology. The last prototype, which was submitted in March 2017, consists of a full signal chain: 8 front-end channels + 2 ADCs + 1 SRAM. The mask layout of this prototype is shown in Fig. 4. The chip was back from the foundry in July 2017. The measurement results for these prototypes will be presented and the key issues which have to be solved in the final chip will be discussed in the conference.

Speaker: Dr Xintian Shi (Paul Scherrer Institute)

20:30 A 3.2 Gbps Serial Link Transmitter in 0.18 µm CMOS Technology for CMOS Monolithic Active Pixel Sensors Application

CMOS monolithic active pixel sensors (MAPS) with high-speed serial data links are demanded by numerous future subatomic physics experiments due to the increasing hit density, low material budget requirements. A MAPS integrated a serial link transmitter meets requirement of this application due to its saving cables/connectors and high reliability in contrast to with a parallel data link. We present a 3.2 Gbps serial link transmitter designed for CMOS MAPS application in 0.18 µm CMOS Technology. The transmitter includes a PLL for clock generation, a digital interface block with Reed-Solomon encoder, and a CML driver with pre-emphasis. We also considered radiation tolerance in the design.
The PLL generates a 1.6 GHz clock from a 40 MHz reference clock. A ring Voltage-Controlled Oscillator (VCO) is employed due to its area efficiency. The charge pump current and the loop filter resistor are programmable to minimize the jitter. Since the half-rate serializer structure we used is sensitive to the duty cycle of clock signal, a duty-cycle correction circuit is adopted to alleviate Duty-Cycle Distortion (DCD). The clock divider in the PLL loop is triplicated to resist SEU.
The digital interface block combines the user data into 320-bit data frame in which there are a 10-bit frame head, 256-bit pixel data, a 14-bit timestamp and 40-bit overhead. The 256-bit raw data is received at 10 MHz from MAPS. The data with timestamp is scrambled and then encoded with Reed-Solomon algorithm. One can recover SEU up to 20 consecutive bit in a frame, benefiting from this RS(31,27) encoding in our scheme, which is suitable for burst errors in subatomic experiments. The digital interface block delivers data with 32-bit width at frequency of 100 MHz to the serializer. The digital interface block is fully triplicated because that the feedbacks in the scrambler and the encoder are sensitive to errors induced by SEU.
The serializer is a 32:1 multiplexer with 5-stage binary-tree structure. The serializer provides a complementary signal and its two copies of one and two clock period delay to the CML driver.
The CML driver realizes pre-emphasis with one main driver and two post-taps. The output swing and the tap coefficient is programmable. The maximum swing when all the pre-emphasis are off is 800 mV across two 50 Ω internal termination resistors.
The 3.2 Gbps serial link transmitter is designed in a 0.18 µm CMOS technology. The functionalities are verified by simulation. The transmitter consumes 174 mW from a 1.8 V power supply. The prototype have been submitted in May. We expect to report the measurement results on the conference.

Speaker: Le Xiao (Central China Normal University)

gct poster HSTD11-v0p3.pdf

20:31 Two low-power optical data transmission ASICs for the ATLAS liquid argon calorimeter readout upgrade

A serializer ASIC and a VCSEL driver ASIC are needed for the front-end optical data transmission in the ATLAS liquid argon calorimeter readout phase-I upgrade. The baseline ASICs are the serializer LOCx2 and the VCSEL driver LOCld. They are designed in a 0.25-um Silicon-on-Sapphire (SoS) CMOS technology and consume 950 mW and 217 mW, respectively. Based on a 130-nm CMOS technology, we decide to exercise our expertise to design two pin-to-pin backup ASICs, LOCx2-130 and LOCld-130. Their power consumptions are about half of those of their counterparts. We present the design and test result of LOCx2-130 and the design of LOCld-130.

LOCx2-130 is a low-power, low-latency, dual-channel serializer ASIC and each channel operates at 4.8 Gbps. The two data channels share a PLL. Each channel has a custom data encoder and a serializer. The encoder is digitally synthesized with the transmission latency optimization and protected with triple modular redundancy technique. The PLL and the serializer are adapted from a design that originates from the CERN’s GBTX ASIC. The LOCx2-130 prototype has been fabricated, packaged, and evaluated. The power consumption of LOCx2-130 is 440 mW at the design speed of 4.8 Gbps. The output of the serializer passes the eye mask test with a bit error rate of below 10$^{-12}$. The latency of the chip is less than 34 ns. LOCx2-130 will be fabricated in an engineering run this fall.
LOCld-130 is a dual-channel VCSEL driver ASIC and each channel operates at 5 Gbps. Each channel in the ASIC is individually powered, making the ASIC suitable for applications in dual-channel transmitters or in transceivers. The analog core of LOCld-130 has two parts: a limiting amplifier (LA) and a high-current differential driver. The gain of the LA is 14 dB. A shared inductive peaking is used in the 2-stage amplifier to boost the bandwidth to 3.5 GHz. The power consumption of LOCld-130 is 112 mW when the modulation current is 6 mA and the bias current is 2 mA. The design has been verified in simulation and is ready for submission.

Speaker: Mr Le Xiao (Department of Physics, Central China Normal University)

Poster LOCx2-130 and LOCld-130.pdf

20:32 Development of a Multi-Channel Silicon Strip Particle Detector using the Slew Rate Limited ToT ASIC for High-Sensitivity HERDA System

High-resolution Elastic Recoil Detection Analysis (HERDA), which consists of a magnet and a position sensitive detector, is one of the promising methods of quantitative analysis of hydrogen in material surface.
As the position sensitive detector for HERDA, Micro channel plates (MCP) are mainly used, however, the count rate (~1000 cps) and the noises of dark current of a MCP and stray ions in a chamber limits the measurement time (~several tens of minutes) and the detection limit (~10$^{21}$ atoms/cm$^{3}$). For improving the count rate and the signal to noise ratio to achieve higher sensitivity, the HERDA system using multi-channel Si based position sensitive detector has been developed. Also, as a low noise, parallel and fast readout circuit from the detector, a slew rate limited Time-over-Threshold (ToT) ASIC, which has 48 sets of a preamplifier and a slew rate limited shaping amplifier and a comparator, was designed and manufactured using 0.25 $\mu$m TSMC’s 2.5/3.3 V CMOS process. The result combined with a slew limited ToT ASIC and a multi-channel silicon strip particle detector will be reported.

Speaker: Ms Mizuki Uenomachi (The University of Tokyo)

20:33 Development of a cryogenic readout circuit based on FD-SOI CMOS for a far-infrared astronomical image sensor

We are developing an image sensor with sensitivity to far-infrared (IR) wavelengths ranging from 30 to 200 $\rm \mu m$ for astronomical observations. Our image sensor consists of a cryogenic readout integrated circuit (ROIC) and a semiconductor detector, such as germanium which is often used for a far-IR detector. The detector must be cooled down below 2 K to reduce thermal noise; the dark current of the detector is reduced to be below 5 fA. To achieve the detector noise limit, the input leak current of the ROIC should be lower than the detector dark current. The ROIC based on MOSFETs is advantageous to achieve such very low leak current.

However, conventional bulk-MOSFETs, in particular NMOS FETs, show degradation such as the kink effect and hysteresis in drain current at cryogenic temperatures. These anomalies are caused by instability of the potential distribution in the MOSFETs under a carrier freezeout condition. In contrast, MOSFETs fabricated by a fully depleted silicon-on-insulator (FD-SOI) CMOS process show stable characteristics at cryogenic temperatures. Due to very thin Si bodies and thus full depleted ones, FD-SOI MOSFETs have no neutral region where the anomalies by carrier freezeout may happen. We designed the ROIC using FD-SOI CMOS whose I-V curves are not almost affected by the kink effect and the hysteresis.

The ROIC for multiple detector pixels consists of trans-impedance amplifiers and a multiplexer for switching output lines. In recent works, we developed a capacitive trans-impedance amplifier (CTIA) based on FD-SOI CMOS for impedance transformation and current/voltage conversion and evaluated the performance at 4 K. We demonstrated that our CTIA works as designed and that the input leak current is $\rm < 1.4 \times 10^{-17}~A$. Those results meet our requirements on the CTIA. Moreover, we designed an analog CMOS switch and a shift-resistor for the signal-multiplexing. In this presentation, we will report the development status of the cryogenic ROIC.

Speaker: Dr Koichi Nagase (Japan Aerospace Exploration Agency)

SOIPIX_nagase_poster.pdf

20:34 Radiation Tolerant RF-LDMOS Transistors, Integrated into a 0.25µm SiGe-BICMOS Technology

Mixed signal on chip solutions for space applications and high energy physics experiments require high voltage RF-LDMOS transistors with a sufficient ruggedness against ionizing radiation and single event burn out.
We report on a novel hardening by design approach for radiation tolerant integrated RF NLDMOS transistors confirmed by single event burn out (SEB) and total ionizing dose (TID) radiation tests. In order to substantially decrease TID induced leakage currents the lateral shallow trench isolation (STI) of the MOS transistors was replaced by narrow junction isolation regions. For a significant increase of the NLDMOS SEB onset voltage a cascode arrangement consisting of an isolated NMOS (i NMOS) and NLDMOS was chosen. The floating NLDMOS source node of the cascode arrangement is always reverse biased what efficiently avoids the turning on of the parasitic bipolar transistor of the NLDMOS. The junction isolated i NMOS/NLDMOS cascode features a break down voltage BVDS > 45V a maximum cut off frequency fT = 5 GHz and a maximum oscillation frequency fMAX = 14 GHz. In comparison with standard NLDMOS the laterally junction isolated i-NMOS/NLDMOS cascode device shows an increase of the SEB onset voltage from 14V to 30V at a linear energy transfer LET of 67.7 MeVcm2/mg and a negligible increase of source drain leakage currents up to a TID of 1.5 Mrad after irradiation with a 60Co source.

Speaker: Dr Roland Sorge (IHP)

R_Sorge_Hiroshima_Symposium_2017_7.pdf

20:35 FLAME readout ASIC for luminosity detector in future linear collider

Future high energy physics experiments, like future linear collider ILC/CLIC, put new challenges for detector readout systems. One of such challenges is to develop a very low power multi-channel readout ASIC containing analog front-end and fast analog-to-digital converter (ADC) in each channel. This would allow the use of very simple and elegant readout architecture, comprising also an on-chip digital signal processing (DSP). In the past the main obstacle in realization of such readout architecture was the lack of fast ultra-low power ADC. Recently, with the availability of modern CMOS technologies and new power-efficient ADC architectures the development of fast low power mix-mode readout ASICs became possible. Such readout ASIC, FLAME (FcaL Asic for Multiplane rEadout), is being developed for the readout of luminosity detector (LumiCal) in future linear collider. It will work with radially segmented silicon pad sensors with capacitances in the range 5-20pF. It will operate either in low gain „physics” mode with signals up to several pC or in high gain „calibration” mode with minimum ionizing particles (MIPs). To relax requirements on cooling and further decrease the consumed power it will use power cycling, i.e. most of its functionalities will be active only during the beam trains and switched off between them.

The FLAME is a multi-channel ultra-low power readout ASIC in CMOS 130 nm, comprising an analog front-end and fast 10-bit ADC in each channel, followed by fast serialization and data transmission. In addition it contains all other necessary functionalities (DACs, interfaces). In the first development stage, two prototype ASICs have been designed, fabricated and tested: the FLAME ver.0 ASIC and the fast serializer ASIC. In the next step they will be integrated into the complete FLAME ASIC.

The FLAME ver.0 is an 8-channel readout ASIC comprising analog front-end and fast ultra-low power ADC in each channel. The front-end has variable gain, fully differential CR-RC shaper with peaking time 50ns and simulated noise ENC~900el@20pF (calibration mode). The ADC has successive approximation (SAR) architecture and can sample the data with variable frequency, up to 40MSps. The total power consumption per channel is below 2mW. The serializer ASIC contains ultra-low power multi-phase PLL based serializer and fast Source-Series Termination (SST) output driver, which should work up to 20Gbps.

First tests of both ASICs have been performed confirming their basic functionalities and measurements of important parameters showed a good agreement with simulations. In particular, the shape and noise of the front-end pulses were measured before and after ADC conversion, for different input capacitances. For the serializer ASIC first eye diagrams were measured at 5Gbps output rate. Detailed measurements are still in progress.

In the presentation the design of the FLAME together with the results of first measurements of the prototype ASICs will be discussed.

Speaker: Marek Idzik (AGH University of Science and Technology (PL))

poster.pdf

20:36 A Track Finder with Associative Memories and FPGAs for the L1 Trigger of the CMS experiment at HL-LHC

The LHC accelerator at CERN is scheduled for an upgrade that will more than triple its instantaneous luminosity over the next decade. The Compact Muon Solenoid (CMS) experiment will have to cope with these new running conditions. The new tracking system under development will be capable of measuring the transverse momentum of charged particles down to 2-3 GeV/c at each bunch crossing (40 MHz), allowing for a Level-1 trigger decision that includes the precise tracking information. For this purpose, an architecture based on Associative Memories and FPGAs has been developed to identify hits and fit them into tracks in an overall processing latency of less than 4us. A hardware demonstrator system, based on a ATCA architecture, has been implemented to prove the feasibility of this approach and to measure its performances. We present the simulation/emulation framework utilized for the system optimization and the results from the hardware demonstrator.

Speaker: Roberto Rossin (Universita e INFN, Padova (IT))

20:37 A Novel Pixel Region Architecture for Pixel detector at HL-LHC: the Central Buffer Architecture of RD53a prototype

The work focuses on the development of a novel digital architecture for the pixel
chips for HEP experiments. The Pixel Detectors in HL-LHC experiments will
have to maintain high efficiency under very high pixel hit rates (3GHz), and high
trigger frequency (1MHz) and latency (12.5$\mu$s). As Column Drain architectures
would need a very high bandwidth for data transfer between the Pixels and the Chip
Periphery, research has moved onto decentralised buffering in the Pixel Matrix itself.
Although working examples of this principle have already been documented, the long
term pixel data retention is still a challenge for the anticipated high data rates,
because of the amount of data to be stored in the pixels. Our approach tackles this
problem by grouping pixels in large Pixel Regions and compressing their TOT data
before saving. Every pixel has a core digital logic which manage the Analog Front-Ends,
evaluates the TOT and latches its value for later processing. As the TOT computation
length is unknown and different per-pixel, synchronisation is needed before the
compression. A synchronisation stage achieves this with countdown timers, which in turn
trigger data compression and writing. Compression is lossy, with a fixed number of TOTs
that can be written per event. Already tested in the CHIPIX65_FE0 prototype, the
architecture has been updated for the RD53a design in order to further reduce the
inefficiencies and prepare the design to be scaled for larger pixel chips. The resulting reduction
in area in the Pixel Regions makes this architecture flexible in terms of design parameters,
scalable in the number of TOTs, TOT bits, and buffer depth: by tuning them, it's possible to achieve high efficiency on a wide range of applications.

Speaker: Andrea Paterno (Universita e INFN Torino (IT))

20:38 TIGER, a front-end ASIC for timing and energy measurement with radiation detectors

We present a front-end ASIC that allows simultaneous time and energy measurements with radiation detectors. The chip, called TIGER, has been primarily developed to readout the Cylindrical Gas Electron Multiplier detector (CGEM), a novel ultra-light weight tracker to be installed in the inner part of the BESIII experiment in Beijing. Due to its characteristics and performance, the integrated circuit is also well suited to readout silicon strip sensors. In an area of 5 mm x 5 mm, the ASIC incorporates 64 channels. Each channel features a Charge Sensitive Amplifier followed by a dual shaper. The input stage can accommodate an input capacitance up to 150 pF. The bias of the input transistor can be adjusted through an on chip bias DAC to optimise the noise performance and the power consumption according to the sensor capacitance. The peaking time of the two shapers is respectively 60 and 180 ns. These values were chosen to optimise the time and energy resolution in the original application. All the core amplifiers employed in the front-end have rail-to-rail outputs to maximise the dynamic range.
Each shaper is followed by a discriminator with locally programmable threshold. A low power time-to-digital converter based on clock counters with analog interpolators allows to capture the firing time of the discriminator with a binning as low as 50 ps. The digitisation of the signal charge can be done either with Time-over-Threshold or with peak sampling, In the ToT mode, a second TDC measures the time corresponding to the falling edge of the discriminator signal. In the peak sampling mode, the output of the slow shaper is stored in a capacitor. The sampling signal is obtained by delaying properly the rising edge of the digital pulse generated by the discriminator connected to the fast shaper. The amount of delay can be programmed on a channel-per-channel basis. The value stored in the capacitor is then digitised with a 10-bit Wilkinson ADC. For derandomization purposes, four sampling capacitors are provided in each channel. The digitised data are sent out of chip through LVDS links. The ASIC can handle an event rate in excess of 60 kHz per channel. The digital logic runs with a clock frequency of 160 MHz. Protection against Single Event Upset has been also introduced.
Experimental data show a rms noise of 1500 rms electrons with 100 pF input capacitance, a charge linearity better than 0.2% over a range of 40 fC and an intrinsic time resolution of the TDC of 50 ps. The maximum power consumption is 13 mW/channel. The chip has been fabricated in a 110 nm CMOS technology. The ASIC has been produced in a dedicated engineering run, which allowed to accommodate different flavours, including one with current mode signal processing and programmable gain.
In the presentation, the chip design and the experimental results will be discussed in detail.

This research activity has been funded by the EU and INFN by means of the project BESIIICGEM RISE 645664 within the call H2020-MSCA-RISE-2014

Speaker: Rivetti Angelo (INFN-Sezione di Torino)

20:39 Modeling Radiation Damage to Pixel Sensors in the ATLAS Detector

Silicon pixel detectors are at the core of the current and planned upgrade of the ATLAS detector at the Large Hadron Collider (LHC). As the closest detector component to the interaction point, these detectors will be subjected to a significant amount of radiation over their lifetime: prior to the High-Luminosity LHC (HL-LHC), the innermost layers will receive a fluence in excess of 10**15 neq/cm2 and the HL-HLC detector upgrades must cope with an order of magnitude higher fluence integrated over their lifetimes. Simulating radiation damage is critical in order to make accurate predictions for current future detector performance that will enable searches for new particles and forces as well as precision measurements of Standard Model particles such as the Higgs boson. We present a digitization model that includes radiation damage effects to the ATLAS pixel sensors for the first time and considers both planar and 3D sensor designs. In addition to thoroughly describing the setup, we compare predictions for basic pixel cluster properties on leakage currents, depletion voltage, charge collection efficiency, Lorentz angle etc. with real data collected at LHC proton-proton collisions.

Speaker: Dr Gilberto Giugliarelli (University of Udine and INFN (IT))

RadDamage3DPixel_poster_GG.pdf

20:40 Comparison of transient response characteristics in the CIS detector irradiated by gamma rays and X rays

CMOS image sensors (CISs) have many advantages for the applications such as particle detection, nuclear industry, and space imaging sensors and have been widely used as the detectors for particle detection and space applications. However, the CIS detectors are sensitive to the radiation damage for applications in the harsh radiation environments such as space and nuclear environments. The transient responses of the CISs during radiation are one of the most important key issues to the detector design, reliability and applicability. Though many papers have reported the stable accumulated dose (such as the total ionizing dose and displacement damage dose) radiation effects in CISs, fewer papers have focused on the transient response in PPD CISs induced by radiation, especially for the comparison of transient response characteristics in the CIS detector irradiated by gamma rays and X rays.
The paper reported herein examines of the transient response characteristics in the CIS detector irradiated by gamma rays and X rays. The CISs have 4 Megapixels and pinned photodiode (PPD) pixel architecture with a standard 0.18 μm CMOS technology. The transient radiation experiments of the PPD CISs are carried out by a 60^Co gamma ray source and X ray source (at the Northwest Institute of Nuclear Technology, Xi’an, CHN). The dark signal distributions of the dark images induced by gamma rays and X rays during radiation are analyzed to compare the difference of transient response characteristics. The mechanisms of the transient effects in the CIS detectors are demonstrated by combining the experimental results and theoretical analysis.

Speaker: Prof. Zujun Wang (Northwest Institute of Nuclear Technology)

20:41 The transient degradation of neutron irradiation on CMOS image sensor: experiments and simulations

When operating in the neutron radiation environments, CMOS image sensors (CISs) would be damaged. The neutron radiation damage mainly includes permanent damage and transient damage. The objective of this work is to analyze the transient degradation of CIS in neutron radiation environments by experiments and simulations. The sample (CIS) is manufactured in commercial 0.18 μm CMOS technology. The image array is made of 2048×2048 11-μm square pixels.
The experiments are carried out at Northwest Institute of Nuclear Technology, China. The ration of n/γ is 4.19×10^9 n/(cm^2rad(Si)). The neutron spectra are measurement by the staff of the radiation facility. The angles of incident neutron (angle between incident neutron and the normal to the surface of the CIS) are 0°, 30°, 60°, and 75°.The raw image at different angles are captured during the neutron irradiation.
The simplified 3D CIS array is established by Monte Carlo code Geant4. The nuclear interactions are included in the physics process. The multiple scattering for any kinds of the charged particle are simulated. The ionizing doses of neutrons in the sensitive volume of the CIS are calculated. The simulated raw images are compared with the experimental raw images. The transient degradation mechanism of the neutron irradiation on the CIS is analyzed. The transient degradations of neutron irradiation on the CIS with different pixel pitches are also simulated.

Speaker: Mr Xue Yuanyuan (Northwest Institute of Nuclear Technology)

20:42 Correlation between Radiation Damage and Electrical Characteristics of the Proton-irradiated Silicon PN Diode

The present study describes the correlation between radiation damages and electrical properties of the PN diode after irradiation the energy proton. The PN diodes were irradiated at difference irradiation energies of 5.26, 7.2, and 8.67 MeV with the proton doses of 1 x 10¹⁰, 1 x 10¹¹, and 1 x 10¹² cm^-2. The final 3D distribution of the ions and all kinetic phenomena associated with the ion energy loss, such vacancies, sputtering, ionization, and phonon production can be estimated by using the calculation packages (SDTrimSP and IM3D). From the findings, it is observed that the penetration of protons into the PN diode leads to the production of lattice defects in the form of vacancies, defect clusters and dislocations. As to the ionization effects in the PN diode, the total ionizing dose and single event effects were also calculated. In practical terms, the capacitance–voltage and current–voltage characteristics of the PN diode after irradiation has been measured to deduce the correlation between the damage creations and the electrical properties.

Keywords: Radiation damage, SDTrimSP, Proton, Semiconductor device.

Speaker: Dr Sy Minh Tuan HOANG (Duy Tan University)

20:43 Enhanced Effects of Neutron Displacement Damage on Total Ionizing Dose Degradation in SOI MOSFET and Gate-controlled Lateral PNP Bipolar Transistor

SOI MOSFET and Gate-controlled Lateral PNP Bipolar Transistor (GCLPNP) are two kinds of semiconductor devices sensitive to total ionizing dose effects (TID). Generally it is thought that TID and displacement damage are independent with each other, however, recent research indicates that total ionizing dose degradations in these two kinds of devices can be enhanced by high fluence neutron induced-displacement damage. In order to investigate the physical mechanisms, TCAD simulations and TCAD-SPICE mixed simulations were carried out to simulate the collector current Ic versus gate voltage Vg (sub-threshold sweep characteristics) and gate-substrate capacitance Cgs versus gate voltage Vg (C-V characteristics) of GCLPNP, and drain-source current Ids versus gate voltage Vg (transfer characteristics) of SOI MOSFET. The displacement damage induced by neutron irradiation was simulated by inserting hole traps in the oxide layer, and its influence on TID degradation was simulated by modelling the capture process of carriers ionized by gamma irradiation in the displacement-induced hole traps. The results indicate that neutron-induced displacement damage in the oxide layer can increase the sensitivity of subsequent total ionizing dose degradation, leading to enhanced voltage shift of sub-threshold sweep characteristics and C-V characteristics of GCLPNP and transfer characteristics of SOI MOSFET. Besides, the displacement damage in the buried oxide layer can also lead to more severe subthreshold leakage current in SOI MOSFET. The results are beneficial to radiation hardening design in mixed irradiation environment of neutrons and gamma rays.

Speaker: Ms Chenhui Wang (State Key Laboratory of Intense Pulsed Irradiation Simulation and Effect, Northwest Institute of Nuclear Technology, China )

20:44 Study of damages induced on ATLAS silicon by fast extracted and intense proton beam irradiation

The ATLAS silicon tracker detectors are designed to sustain high dose integrated over several years of operation. This very substantial radiation hardness should also favour the survival of the detector in case of accidental beam losses. In the past, measurements have been done for the pixel detector, confirming that it could survive to beam losses with minimal or no deterioration of performance. The upgrade of LHC to even higher luminosity (HL-LHC) calls for a new tests of these properties. In this presentation preliminary results will be shown, reporting the effect of a very intensive proton beam releasing a high instantaneous dose in two IBL pixel and one strip module detectors at High-Radiation to Materials (HiRadMat) Facility of CERN Super Proton Synchrotron.

Speaker: Andrea Gaudiello (INFN e Universita Genova (IT))

Hiroshima2017-Gaudiello_Final.pdf

20:45 Radiation damage evaluation of the CCD detector induced by high energy protons

Charge coupled devices (CCDs) have many merits such as low cost, low noise, low power consumption, and high sensitively. Because of these merits, they have been widely used as the detectors for particle detection and space applications. However, the CCD detectors used in the above applications will be operated in the high energy proton radiation environments and be susceptible to radiation damages such as ionizing damage and displacement damage. The radiation damage evaluation of the CCD detector induced by high energy protons will help the designers to improve the CCD detector design, reliability and applicability for applications in the high energy proton radiation environments. Though many papers have been published on the radiation damages in the CCDs, fewer papers have focused on the radiation damage evaluation of the CCD detector induced by high energy protons.
The research reported herein examines the high energy proton radiation effects on the CCD detectors. The radiation experiments are carried out at the cyclotron accelerator (at China institute of atomic energy, Beijing, CHN) with energies of 30, 60, 100 MeV. The degradations of the CCD parameters such as dark current, dark signal non-uniformity (DSNU), saturation output, dynamic range (DR), and signal to noise ratio (SNR) induced by proton radiation are analyzed. The degradations versus the proton fluences are presented. The degradations induced by different proton energies are compared. The degradation mechanisms of the CCD parameters induced by proton radiation damage are demonstrated in details. The research will provide the radiation damage evaluation of the CCD detector induced by high energy protons to instruct the detector design for applications in the high energy proton radiation environments.

Speaker: Prof. Zujun Wang (Northwest Institute of Nuclear Technology)

20:46 Dark-Current Estimation Method for CMOS Image Sensor in Mixed Radiation Environment

Nowadays, CMOS image sensors (CIS) are more and more used in a wide variety of applications, especially in satellite systems, high energy physics setups, where they are exposed to mixed radiation sources. The sensors suffer from radiation-induced dark-current degradation that the dark-current mean value and non-uniformity increase, which results in the signal-to-noise-ratio (SNR) decrease affecting the image quality. Especially, for long working period, dark-current degradation has been proved to be the dominant noise issue for high SNR imaging. Needless to say, it’s very important to assess the possible dark current degradation of a given CIS before it is selected for a specific application in radiation environment.
Previous reports illustrated that charge trap density in Si/SiO$_2$ is proportional to the ionizing dose, which helps building a linear relationship between dark-current and ionizing dose. Also, it has been reported that displacement damage dose induced dark-current in silicon could be reasonably fitted to a power-law function of the particle's energy. Based on the knowledge above, it's able to illustrate the dark-current probability density function (PDF) of the whole pixel array under the radiation of single kind of particles. However, the models cannot be used when there is more than one radiation source in the environment, which is a more common situation.
In order to estimate the CIS dark-current behavior in mixed radiation environment, we propose using probability operation to estimate the pixel array's dark-current PDF, assuming that particles incident events are uncorrelated. Simulations are implemented upon a set of data ( dark images derived under $\gamma$-rays(10 Krad) and protons ($\Phi_p=10^{10}\;p/cm^2$, $E$=40 MeV)).The results show that the dark-current mean-value and non-uniformity calculated using the proposed method almost equal to the simulation results under $\gamma$-proton mixed radiation, with errors no more than 4% and 5%,respectively.
Further validation of the proposed method will be implemented through radiation experiment this autumn. Once the proposed method is validated in practice, It can do great help in CIS dark-current estimation under sophisticated radiation environment where the devices are exposed, at the same time, to more than one kind of radiation particles.

Speaker: Mrs xiaomin Wei (Northwestern Polytechnical University)

Poster for abstract 177.pdf

Poster for abstract 177.ppt

20:47 Final system test results of the DEPFET based Belle II pixel detector PXD

The DEPFET PXD Collaboration is building a highly
granular, ultra-transparent active pixel detector for high performance
vertex reconstruction at the Belle II experiment,
KEK, Japan. A complete detector system is being developed,
including solutions for ultra-thin sensors and their mechanical
support, r/o ASICs, cooling, services, and a DAQ system capable
of handling the huge amount of data coming from the pixel
detector.
The sensor production as well as the final ASIC production is
finished and the module series production is in full swing. Final
system tests as well as detailed characterization of the modules
have been done. Recent milestone achievements are a full system
test of PXD and SVD in the test beam and the commissioning of
the pre-experiment “BEAST 2” which is about to start early 2018.
This paper will focus on the achievements during the full
system test at DESY early 2017 and present a detailed discussion
of one of the last open questions for the operation of the DEPFET
PXD system at the SuperKEKB collider – the so-called gated mode
of the DEPFET system.

Speaker: Ladislav Andricek (MPG Semiconductor Lab)

20:48 Construction and Commissioning of the CMS Phase 1 Pixel Detector

The original CMS pixel detector was built out of pixel detectors arranged in three barrel layers (BPIX) and two forward disks in each endcap (FPIX). It was designed for the nominal instantaneous LHC luminosity of 1 x 10^34 cm^-2 s^-1. Under the conditions expected in the coming years, which will see an increase of a factor two of the instantaneous luminosity, the CMS pixel detector will see a dynamic inefficiency caused by data losses due to buffer overflows. For this reason the CMS Collaboration has installed, during the recent extended end of year shutdown, a replacement pixel detector.

The Phase I upgrade of the CMS pixel detector will operate at full efficiency at an instantaneous luminosity of 2 x 10^34 cm^-2 s^-1 with increased detector acceptance and additional redundancy for the tracking. Both barrel and endcap disk system now feature one extra layer (4 barrel layers and 3 endcap disks), and a digital readout that provides a large enough bandwidth to read out its 124M pixel channels (87.7% more pixels compared to the previous system). The detector is now also fitted with a bi-phase CO2 cooling system that reduces the material budget in the tracking region. The detector has been installed inside the CMS tracker at the start of 2017 and is now taking data.

This contribution will review the construction of the Phase I detector with a focus on the challenges and difficulties encountered, as well as the lessons learned for future upgrades. It will focus on the detector construction, installation, and support services. It will also discuss the early experiences in the commissioning and operation of the CMS phase-I pixel detector prior to the availability of colliding beams.

Speaker: Miaoyuan Liu (Fermi National Accelerator Lab. (US))

20:49 Alignment of the upgraded CMS pixel detector

The all-silicon tracking system of the CMS experiment provided excellent resolution for charged tracks and an efficient tagging of heavy flavor jets during Run1 and Run2 of the LHC. After a new pixel detector has been installed during the LHC technical stop at the beginning of 2017, the positions, orientations, and surface curvatures of the sensors needed to be determined with a precision at the order of few micrometers to ensure the required physics performance. This is far beyond the mechanical mounting precision but can be achieved using an in-situ track-based alignment procedure that minimises the track-hit residuals of reconstructed tracks. During operation, the alignment also needs to be quickly recalculated each time the state of the CMS magnet is changed between 0T and 3.8T. The geometries are carefully validated with data-driven methods.

We present latest results of the CMS tracker alignment in 2017 from the early detector-commissioning phase and the later operation, that were derived using several million reconstructed tracks from collisions and cosmic-rays data. Special emphasis is put on the alignment of the new pixel detector.

Speaker: Matthias Schroeder (KIT - Karlsruhe Institute of Technology (DE))

2017-12-10_HSTD11_Okinawa_schroeder.pdf

20:50 Development of a MAPS detector prototype for the BESIII inner drift chamber upgrade

A three layers MAPS (monolithic active pixel sensor) detector prototype, 1/10 coverage of the BESIII (Beijing spectrometer III) inner tracker, is select as one of the pre-research schemes of the BESIII inner drift chamber upgrade, due to its quite attractive features of low material budget, low power consumption and high spatial resolution. We present the design, the construction and the test of the ladder which is the basic building block of the detector, consisting of 10 Mimosa28 chips thinned to 50µm, a flex cable and a carbon fiber supporter. The design and the development of the electronics are introduced as well. A probe test system for good chips selection was set up to complete the chip functional check and preliminary performance test before the construction of the ladders. A platform was designed and manufactured for the construction of the ladders. Using this platform, precise location of the chips and gluing the flexible cable to the carbon fiber supporter and to the chips were achieved. The material budget of the whole ladder with the carbon fiber composite supporter is about 0.5% X。, and the average precision of the chip location is better than 10µm. The tests of the ladders have been carried out. Both the ladder and the readout electronics work well. The preliminary results are consistent with the expected ones, which provide a good foundation for the further study of the detector prototype.

Speaker: Dr Mingyi Dong (Institute of High Energy Physics, Chinese Academy of Sciences, Beijing, China)

Development of a MAPS detector prototype for the BESIII inner drift chamber upgrade.pdf

20:51 A multi-channel PCI Express readout board for fast readout of large pixel detectors

Over the last years the ATLAS Pixel Detector has been upgraded in terms of sensors and readout electronics. The readout-driver cards have been upgraded for the entire Pixel Detectors, which features millions of channels to stand the on-going increment of luminosity of the collider at CERN. The challenge of upgrading the readout electronics for the huge matrices of pixel detectors has led us to design and fabricate a PCI_express board (Pixel-ROD) with all the necessary I/Os looking at the performance to interface with the current and future front end electronic chains. For example, the intention is to interface with the GBT and RD53A chips that will be used for the LHC upgrade.
In particular the GBTx communication has recently been optically interfaced at a rate of 10 Gb/s with a mini-FELIX card in the NIKHEF laboratory in Amsterdam. Other tests have been physically carried out at a rate of 4.8 GB/s using the 64b/66b Aurora protocol.
We are building a demonstrator tool able to emulate a data-taking of physical streams, by connecting together many Pixel-ROD boards. Also, an 8-hour PCI-express DMA readout has been proved towards a PC mother board, with an overall bit-error-rate less than 10^-15.
The Pixel-ROD board features a 8x PCI express bus and two Xilinx FPGAs: the Kintex7 XC7K325T-2FFG900C and the Zynq XC7Z020-1CLG484C with an embedded physical dual-core ARM Cortex-A9 processor. The Kintex device tested 16 transceivers nominally running at up to 12 Gs/s. These 16 GTx are connected to different types of physical ports: 8 PCI_express, 4 HPC FMC, 1 LPC FMC, 1 SMA, 1 SFP and 1 Gb-Ethernet port. So far we have proved the coaxial link to the SMA, the optical channel to the SFP and the Ethernet links up to 10 Gb/s.
In addition the two Xilinx devices feature DDR3 external memories tested with read-write cycles at 667 MHz.
The Pixel-ROD board can be equipped with a firmware derived from the one that is currently working into the BOC and ROD boards of the ATLAS Pixel Detector.
As the Pixel-ROD features 16 GTx channels we are proposing the board as a tool to test, qualify and read out the recent chips and/or channels under development to interface new generation of pixel detectors, besides those for the LHC upgrade. We are planning to extend the use of the board within other CERN-based collaborations.

Speaker: Alessandro Gabrielli (INFN and Physics and Astronomy Dep. University of Bologna)

Poster-gabrielli - Pixel_ROD.pdf

20:52 Novel technique for luminosity measurement using 3D pixel modules in the ATLAS detector.

The Insertable b-Layer ( IBL ) is the innermost layer of the ATLAS
tracking system. It consists of planar pixel modules in the central
region and 3D modules at two extremities. We use the cluster length
distributions in 3D sensor modules of the IBL to determine the number of
primary charged particles per event and suppress backgrounds. This Pixel
Cluster Counting ( PCC ) algorithm provides a bunch-by-bunch luminosity
measurement. An accurate luminosity measurement is a key component for
precision measurements at the Large Hadron Collider and one of the
largest uncertainties on the luminosity determination in ATLAS arises
from the long-term stability of the measurement technique. The
comparison of the PCC algorithm with other existing algorithms provides
key insights in assessing and reducing such uncertainty.

Speaker: Peilian Liu (Lawrence Berkeley National Lab. (US))

PCC_Lumi.pdf

20:53 Layout overview and developments for the upgrade of the inner tracker of the ATLAS experiment for the High-Luminosity LHC

In the high luminosity era of the Large Hadron Collider, the instantaneous luminosity is expected to reach unprecedented values, resulting in about 200 proton-proton interactions in a typical bunch crossing. To cope with the resultant increase in occupancy, bandwidth and radiation damage, the ATLAS Inner Detector will be replaced by an all-silicon system, the Inner Tracker (ITk), aiming to provide tracking coverage up to |η|<4. 

The ITk consists of an inner pixel and an outer strip detector. The total surface area of silicon in the new pixel system could measure up to 13 m^2, depending on the final layout choice. The strip detector will compromise up to 190 m^2 of silicon.
The design is developed by careful compromises of the conflicting requirements of a low mass, mechanically stable tracker with sufficient number of high granularity sensors for high quality tracking. The required number of hits has to be achieved with various layers of silicon sensors in r-phi.
In the collaboration, a large effort is ongoing to evaluate the design both with simulation and experimental results. First results are collected in the Strip tracker technical design report. Many additional results especially for the pixel detector are in preparation for the Pixel detector technical design report which is due before the end of 2017. An overview of the layout developments and latest design and performance estimates of the ITk detector is presented. Furthermore, highlights of the design choices discussed.

Speaker: Peter Phillips (STFC - Rutherford Appleton Lab. (GB))

HSTD_Layout8.pdf

20:54 Construction of the new silicon microstrips tracker for the Phase-II ATLAS detector

The inner detector of the present ATLAS detector has been designed and developed to function in the environment of the present Large Hadron Collider (LHC). At the next-generation tracking detector proposed for the High Luminosity LHC (HL-LHC), the so-called ATLAS Phase-II Upgrade, the particle densities and radiation levels will be higher by as much as a factor of ten. The new detectors must be faster, they need to be more highly segmented, and covering more area. They also need to be more resistant to radiation, and they require much greater power delivery to the front-end systems. At the same time, they cannot introduce excess material which could undermine performance. For those reasons, the inner tracker of the ATLAS detector must be redesigned and rebuilt completely.
The design of the ATLAS Upgrade inner tracker (ITk) has already been defined. It consists of several layers of silicon particle detectors. The innermost layers will be composed of silicon pixel sensors, and the outer layers will consist of silicon microstrip sensors. This contribution focuses on the strip region of the ITk. The central part of the strips tracker (the "barrel") will be composed of rectangular "short" (~ 2.5 cm) and "long" (~5 cm) strip sensors. The forwards regions of the strips tracker (the "endcaps") consist of 6 disks per side, with trapezoidal shaped microstrip sensors of various lengths and strip pitches. In response to the needs of the strip region for the ITk, highly modular structures are being studied and developed, called "staves" for the central region (barrel) and "petals" for the forward regions (end-caps). These structures integrate large numbers of sensors and readout electronics, with precision light weight mechanical elements and cooling structures. The silicon sensors are
fabricated in n-in-p float zone (FZ) technology. Low mass kapton-based circuit boards (the "hybrids") are directly glued on top of the sensors, hosting the so-called ABCN130 binary readout ASICs. Those ASICs are fabricated in a 130 nm CMOS process. The ASICs are connected to the microstrips via wirebonds. There are 256 channels per ABCN130. Those silicon "modules" are then directly glued onto low-mass, carbon fiber-based stave and petal core structures, with embedded titanium cooling pipes and data and power rails. A data concentrator board on each stave and petal side (the "end of structure" board, EoS) sends all the multiplexed data to the outside world via optical links, and host most of the components of the Detector Control System (DCS). The staves and petals are then
arranged into cylinders and disks, respectively, by means of the integration and global structures.
This contribution will focus on the latest R&D activities performed by ITk strips community with respect to the assembly and test of the strip modules and the stave and petal structures, and their integration into the global structures. The overall plans for the production phase of the experiment will also be detailed.

Speaker: Zhijun Liang (Chinese Academy of Sciences (CN))

20:55 Construction and beam-tests of silicon-tungsten and scintillator-SiPM modules for the CMS High Granularity Calorimeter for HL-LHC

A High Granularity Calorimeter (HGCAL) is being designed to replace the existing endcap calorimeters in CMS for the HL-LHC era. It features unprecedented transverse and longitudinal segmentation for both electromagnetic (ECAL) and hadronic (HCAL) compartments, with silicon sensors being chosen for the high-pseudorapidity regions due to their radiation tolerance. The remainder of the HGCAL, in the lower radiation environment, will use plastic scintillator with on-tile SiPM readout. Prototype hexagonal silicon modules, featuring a new Skiroc2-CMS front-end chip, together with a modified version of the scintillator-SiPM CALICE AHCAL, have been built and tested in beams at CERN in 2017. In this poster, we present measurements of noise, calibration, shower shapes and performance with electrons, pions and muons.

Speaker: Yung-Wei Chang (National Central University (TW))

HGCposter_final_v1.pdf

20:56 Calibration of the CMS Preshower detector in Run1 and Run2

The Preshower detector, part of the CMS Endcap Electromagnetic Calorimeter, is designed to have good spatial resolution to distinguish between different types of incoming particles. The Preshower is a sampling detector with two layers of lead absorber, each followed by 1.9mm pitch silicon strip sensors. Each of the 4288 DC-coupled sensors has an active area of 61x61mm^2, making a total surface of around 16m^2. The in-situ calibration is performed using isolated charged hadrons, which are close to minimum-ionizing. The precision required for the calibration of the Preshower is largely determined by the fraction of energy deposited in the Preshower with respect to that in the CMS endcap crystal calorimeter. The required channel-to-channel calibration precision is 5%. The achieved precision is better than 5%. In this poster, the calibration strategy and results with LHC Run1 and Run2 data will be described.

Speaker: Long Hoa Cao Phuc (National Central University (TW))

20:57 Coincidence method to reduce Si-PM (MPPC) dark counts

Silicon photomultipliers (Si-PM, Multi-pixel photon counter (MPPC)) are a photo detector, which can count photons with multiple avalanche photodiode pixels in Geiger mode. With a high gain (10^6), small size (~mm), and lower operational voltage (~50V), they can be used as a readout of scintillation photons of scintillators. However, the rate of dark counts is high (~1 Mcps) preventing to lower the detection threshold down to a few photons.
Coincidence method by an external trigger is a good technique to reduce the random noise triggers of Si-PMs (MPPCs). Polarimeters in hard X-ray/soft gamma-ray astrophysics is an example, which simultaneously detect a pair of a Compton scattering and photo-absorption signals to measure the azimuthal anisotropy of the scattering angle. Although the energy deposit of the Compton scattering is as low as ~keV, the photo-absorption signal deposits larger energy, which can be used as the external trigger. In this presentation, we show experimental results of a plastic scintillator (EJ-204 4x4x15 mm3) and MPPC (S13360-3050CS 3x3 mm2) to detect Compton scattering signals of a few keV with 241Am pulser. We also discuss other cases using multiple Si-PMs (MPPCs) (e.g., the readout of a large scintillator by an array for an active shield) especially with respect to the lower energy threshold.

Speaker: Prof. Fukazawa Yasushi (Hiroshima University)

20:58 Event selection technique of multi-layer Si-CdTe Compton camera onboard Hitomi

The multi-layer semiconductor Compton camera has been developed by Japanese group for many years and finally, the soft gamma ray detector (SGD) onboard Hitomi, Japanese astronomical satellite has been launched and successfully operated in the orbit. SGD consists of combination of narrow field of view Si-CdTe multi-layer Compton camera and surrounding Bi$_4$Ge$_3$O$_{12}$ (BGO) active shield. Such unique concept enable us to perform astronomical observations in 60 to 600 keV band with the highest sensitivity by minimizing background.
Tracking information of Compton camera is used to reconstruct direction and energy of incoming events and it is essential to investigate an appropriate criteria to distinguish the real astronomical signals and in-oribit background from very large number of combinations of detected signals to perform highly sensitive observations.
The efficient event selection technique to reduce the background is developed in this study by comparing observed astronomical source data and background data for the first time. Various reconstructed parameters such as deposit energy, scattering angle, hit position, ..etc have been compared between source and background observations. Furthermore, layered configuration of Compton camera is also useful to extract cosmic-ray particle events which show a straight line
trajectory. Deposition energy of such cosmic-ray particle events is found to be almost consistent with that of minimum ionizing protons and hit pattern of such particle event can be used to on-board veto for efficient data acquisition. In this contribution, those event selection technique of Compton camera applied to in-orbit data is demonstrated.

Speaker: Dr Masanori Ohno (Hiroshima University)

2017_HSTD_SGDeventselection_v1.pdf

20:59 Performance Study of Large CsI(Tl) Scintillator with MPPC Readout

Short duration gamma-ray bursts (short GRBs, SGRBs) are one of the most promising candidates of electromagnetic radiation from gravitational wave sources.One of the possible methods to localize these GRB events is to launch several small satellites and determine the position of GRBs by using the difference in detection time in each satellite.For accurate determination of these GRB positions, we need accurate time information and sufficient photon statistics.Therefore, we synchronize time information of each satellite by using global positioning system (GPS), and use detectors which have a large area and low energy threshold.Currently, we are designing and developing a fleet of small satellites, coined ``GRBCube'' for detection and position determination of SGRBs.We plan to use CsI scintillator which has high light output and a large area and multi-pixel photon counter (MPPC) which has a small size and low electricity consumption as well as high quantum efficiency.
As a part of the feasibility study of this project, we report the investigation of performance of a system combining CsI scintillator and MPPC.We compared the performance of two scintillators of different sizes ($150\times75\times5$ mm$^3$, $100\times75\times5$ mm$^3$),where the bigger one is the maximum size that can be mounted on a 3-unit satellite, corresponding to the CubeSat standards. We used the one of the latest models of MPPC by Hamamatsu Photonics, S13360-6050CS, which has an effective size of $6\times6$ mm$^2$.We examined the irradiation position dependence of light output using $^{241}$Am (59.5 keV), and confirmed that the threshold level of $\sim$10 keV is achieved by using $^{55}$Fe (5.9 keV).We also plan to test two channels readout in order to further increase the light output and reduce MPPC noise.

Speaker: Kento Torigoe (Hiroshima University)

Performance Study of Large CsI (TI) Scintillator with MPPC Readout.pdf

21:00 Development of a Fabry-Perot spectrometer with high-spatial and spectral resolutions aboard a balloon-borne telescope for far-infrared astronomy

Far-infrared (IR) spectroscopic observations are essential to study physical properties of star-forming regions under various environments, for example. The 158-μm line emission of singly-ionized carbon ([CII]) is one of the strongest far-IR lines as a major cooling channel of the gas-phase interstellar medium, and thus is a key to determine the evolution of ionized and atomic gas phases into the molecular gas phase in which stars are formed. Despite the importance, the origin of the [CII] line emission is spatially unclear yet due to poor spatial resolutions in the far-IR range.

With a balloon-borne far-IR telescope, we have been observing the [CII] line emission from galactic star-forming regions in collaboration with Tata Institute of Fundamental Research in India. The focal plane instrument is a Fabry-Perot spectrometer (FPS) tuned to the [CII] line emission. The FPS mainly consists of a Fabry-Perot (FP) module and a single-pixel stressed Ge photoconductor. The both components are installed into a very limited space to cool them down at 2 K. Because such Ge photoconductors need a large stressing mechanism to extend the cut-off wavelength up to ~200 μm, it is practically difficult to make a compact and large array format. Due to the reason, the single pixel has been used and limits a spatial resolution which does not achieve the diffraction limit.

To break through the limitation, by introducing the room-temperature surface-activated bonding (SAB) technique, we successfully developed a Ge Blocked Impurity Band (BIB) array detector that is sensitive out to ~200 μm without any large stressing mechanisms; the SAB technique enables us to realize a Ge BIB array detector hybridized with an FD-SOI cryo-CMOS readout circuit and thus makes them more compact. By introducing a 5x5 pixel Ge BIB array detector in combination with a new FP module, we are developing a new FPS with high-spatial and spectral resolutions. Then, the spatial resolution will be improved by a factor of ~2. Furthermore, owing to over Nyquist sampling of a diffraction pattern, a super spatial resolution will be achieved by a data analysis process. Here, we will give a presentation of the current development status on the new FPS and of expected scientific impacts from [CII] observations with the new FPS.

Speaker: Hiroki Maeda

21:01 Arcseconds and Sub-Arcseconds Imaging with Multi Image X-ray Interferometer Modules for Small Satellites

The best angular resolution of 0.5 arc-second is realized with the X-ray mirror aboard the Chandra satellite. Nevertheless, further better or comparable resolution is anticipated to be difficult in near future. We propose a new type of X-ray interferometer consisting simply of an X-ray absorption grating and an X-ray spectral imaging detector, such as X-ray CCDs or CMOS detectors, by stacking the multi images created with the Talbot interference (Hayashida et al. 2016). This system, we call Multi Image X-ray Interferometer Module (MIXIM), enables us arcseconds and sub-arcseconds resolution of the X-ray targets. Although the targets of MIXIM are limited to relatively bright sources, as we do not employ collecting mirrors, unique scientific theme, such as, search for super massive black holes and resolving AGN torus would be possible. We introduce the concept of the MIXIM and some results of the ground experiment, in which arcseconds resolution has been achieved with the XRPIX2b detector fabricated with SOI process. Satellite plans of MIXIM raging from arcseconds resolution with a very small satellite to 10 milli-arcseconds resolution with a medium size satellite are also shown.

Speaker: Prof. Kiyoshi Hayashida (Osaka University)

hayasida_20171211_MIXIM.pdf

21:02 Development of optical devices with Subwavelength Structure

We have been developing the fabrication of mono-material optical interference filter toward high-sensitivity terahertz-wave astronomical observation.
There is no hi-transmittance optical filter for IR(Infrared-Rays) with wavelength in the range of 30~60μm due to lack of optical materials. But, silicon is hi-transmittance material in the range of that. Furthermore, using MEMS(Micro Electro Mechanical Systems) technology and SOI(Silicon-On-Insulator) wafer, we can fabricate 3D structure including SWS(SubWavelength Structure) with sufficient accuracy for IR filters. Fabricating interference filters made by only silicon using MEMS technology, we get hi-transmittance optical filter (~80%).
SWS has the effective index of refraction which determined by the porosity. We can control the porosity by the SWS design. The technology of controlling effective index is useful for anti-reflection coating. Fabricating the appropriate SWS layer at the detector's surface, we realize anti-reflection easily.

Speaker: Keita Yamamoto (Sokendai(JAXA/ISAS))

SOIPIX2017ポスター_山本.pdf

21:03 Feasibility Study of Si/CZT Compton Camera Imaging in Breast Cancer Detection using Monte Carlo Simulation

Recently, the Compton camera imaging system has increasingly becoming the subject of detection for breast cancer detection in the field of nuclear medicine [1, 2]. Among detector materials with Compton camera, Si and CZT can dramatically improve angular resolution and sensitivity. The purpose of this study was to design Si/CZT Compton camera imaging system with Monte Carlo simulation using Geant4 Application for Tomographic Emission (GATE) and to confirm above-mentioned system for the breast cancer detection. For that purpose, the Compton camera was designed using dual-head detection system using Si/CZT detector material. Also, two simulated breast cancer materials were chosen in medial region of the breast. According to the result, the SNR of 6.1, 4.3, 2.1, and 0.9 was calculated for 0, 1, 2, and 3 cm backward displacement of cancers at a 511 keV energy, respectively. In conclusion, our results demonstrated that feasibility of Compton camera imaging system for detection of breast cancer was confirmed.

Speaker: YoungJin Lee

21:04 Development of simple proton CT system with novel MCS correction methods

Proton therapy is an advanced cancer therapy that features energy loss of protons, known as the Bragg peak. Owing to high concentration of the radiation dose, the proton range in a patient's body, characterized by the water equivalent length (WEL), must be accurately determined for safe and effective proton therapy. Current treatment planning is based on X-ray CT images, which might cause uncertainty and/or be inaccurate because of the different energy loss processes between protons and X-rays. A more accurate estimate of the WEL is obtained if the proton itself is used for CT imaging. We develop a novel but simple, real-time proton CT system comprising an X-ray scintillator sheet and EM-CCD camera. Since protons lose energy when passing through a subject like a patient’s body or phantoms, different light output corresponding to proton energy loss, is anticipated within a screen sheet, which can be imaged by the EM-CCD camera. Experiments were performed using this technique with 70-MeV and 200-MeV proton beams. Further, we examined two different beam types, broad and narrow beams, which mimic the passive scattering and spot scanning systems generally used in clinical treatment. In all cases, blurring of images caused by multiple Coulomb scattering (MCS) was significant, prompting us to develop various correction methods. One such technique involves changing the distance between the phantom and screen to estimate the proton CT image at the phantom in situ for the broad beam. Deviation from an incident beam profile is corrected as being due to MCS for the narrow beam. We successfully obtain clear images with little MCS effect by applying these correction methods. Moreover, we confirm that the WEL values estimated from the acquired CT images are in good agreement with true values for Polymethyl methacrylate (PMMA), isopropyl alcohol, and Vaseline within 1σ uncertainty.

Speaker: Ms Miho Takabe (Waseda University)

21:05 Fast Timing Monolithic Silicon Pixel Sensor for TOF-PET

Positron emission tomography (PET) is a nuclear medicine method used to observe metabolic processes in the body, by detecting pairs of photons produced by the annihilation of positrons emitted by a $\beta^+$ tracer.
The Thin-TOF PET (TT-PET) project aims at the construction of a small-animal PET scanner based on silicon monolithic pixel sensors with 30 ps time resolution for 511 keV photons. The very high time resolution allows the measurement of the time of flight information of the two photons and a significant reduction of the backgrounds. Technology CAD (TCAD) simulation was used to design a guard ring of the pixel sensor and to study the capacitance and weighting field. SiGe heterojunction bipolar transistor technology (SG13S from IHP Microelectronics with $\beta=900$ and $f_t=250\ \mathrm{\ GHz}$) was chosen to achieve fast integration ($ < 1\ \mathrm{ns}$), low equivalent noise charge (700 electrons on 1 pF capacitance) and low power consumption ($135\ \mathrm{\mu W/mm^2}$). The scanner will be composed of 16 towers in a ring structure and each tower is composed of 60 detection modules, which are formed by a lead foil ($50\ \mathrm{\mu m}$ thick) for photon conversion, a flex circuit ($50\ \mathrm{\mu m}$) for signal transmission and a silicon pixel sensor ($100\ \mathrm{\mu m}$). This novel structure allows to measure the photon depth of interaction, improving the spatial resolution across the whole view of the scanner. A GEANT4 Monte Carlo simulation was implemented to extract the expected performance of the scanner.

Speaker: Daiki Hayakawa (Universite de Geneve (CH))

PosterForHiroshimaSymposium2017_DaikiHayakawa.pdf

21:06 Comparison of X-ray image quality of TFT and CMOS flat-panel detector for mobile C-arm system

Higher spatial resolution in real-time X-ray imaging such as fluoroscopy in mobile C-arm and angiography in C-arm CT imaging system is increasingly demanded by many clinicians at the hospital. They use either x-ray image intensifiers (XII) or flat panel detectors (FPD) as X-ray imaging detectors, which have inherent limitation such like image distortion, low resolution and image lag on the imaging capability. Recently, the large-area flat panel imagers with TFT (thin film transistor) and CMOS (complementary metal-oxide semiconductor) process have been widely used in various X-ray medical imaging applications including dental CT, fluoroscopy and angiography. Specially, the CMOS based X-ray detector has many advantages such as the higher readout speed, low noise, high spatial resolution and high system integration compared to amorphous silicon TFT-based flat panel detector.
In this work, we have investigated the experimental demonstration of radiation dose and X-ray image quality in mobile C-arm system with a TFT and CMOS based flat-panel detector. A-Si TFT based FPD detector having a 397 x 298 mm active area with 388 μm pixel pitch and 1024 x 768 pixels in 2x2 binning mode was used. For comparison, the CMOS x-ray detector with an active pixel sensor (APS) architecture was used. Each pixel has the special feature of two different full well capacities such as high full well (HFW) and low full well (LFW) mode. The CMOS APS detector consist of pixel size with 99µm, different frame rates (30 fps in normal mode and 60 fps in binning mode) and 14-bit ADC for low-dose, high resolution X-ray imaging.
The X-ray imaging performance such as X-ray linearity, signal to noise ratio, dynamic range, spatial resolution and DQE(Detective Quantum Efficiency) were measured and investigated. And quantitative image evaluation with fluoroscopy QA phantom was study in fluoroscopy conditions. X-ray image with about 4.0 lp/mm and spatial frequencies Higher DQE (70% at 0 lp/mm, RQA 5 condition) at low dose (below 2μGy) could be acquired. This paper will demonstrated the significant potential of X-ray CMOS flat-panel detector with high-resolution and high-frame rate in mobile C-arm system for imaging-guided interventions.

Speaker: Prof. Chang-Woo Seo (Yonsei University)

21:07 Optimization of X-ray image acquisition and reconstruction for C-arm CBCT system with flat-panel detector

The introduction of digital flat panel detector (FPD)-based C-arm CBCT (cone-beam computed tomography) system provides an attractive technology for real-time 2D image in standard fluoroscopy and 3D or cross-sectional visualization with higher spatial resolution. A modern CBCT system with C-arm gantry incorporating a large-area flat-panel detector is widely used as an important imaging tool for anatomical diagnosis and image-guidance in spine surgery, orthopedic and interventional suite and image guide radiation therapy. However, the increased scatter in CBCT system with wide-beam angle compared to conventional multidetector CT shows the degradation in image quality such as low contrast, contrast-to-noise (CNR) and CT number calculation. Because of the relatively long image acquisition (4-20seccond) of C-arm CBCT system, patient’s motion artifact is induced and geometrical calibrations are required for precision image quality
In this work, the experimental prototype CBCT imaging platform consists of a benchtop system that is integrated with a cone-beam X-ray tube, filters, a collimator, an anti-scatter grid, and a large-area flat panel detector. This TFT FPD detector provides an active area of 400 x 300 mm2 including a 2,048 x 1,536 matrix array with 194-um pixel pitch as well as 7.5 fps and 30 fps. Usually, the x-ray projection data with scattered radiation produce many artifact in image quality of CBCT system. Anti-scatter grids are used in fluoroscopy and CT in order to reduce scattered radiation and improve the image quality such as low contrast resolution, spatial resolution. Different anti-scatter grids with a grid ratio (GR) of 8-10:1 with 200 lp/inch and carbon-fiber interspacing was used to evaluate imagine quality for specific tasks. The different projection images in C-arm CT system were usually acquired at limited angle scanning with a constant interval at a tube voltage of 40-120kVp, and current of 2-20mA. The performance characterization of CT imaging quality was carried out using the FDK and CS (compressed sensing) reconstruction algorithm through acquired 2D projection images at different scanning angle and projection numbers. The quantitative analysis of image quality was investigated by using the cone-beam CT phantom (QRM GmbH, Erlangen, Germany) for contrast resolution, spatial resolution, noise and modulation transfer function (MTF). The extensive performance characterization of images quality was investigated in terms of X-ray expsoure paramters, anti-scatter grids, limited scanning angle for many application protocols.

Speaker: Prof. Chang-Woo Seo (Yonsei University)

21:08 Tests of thin Low-Gain Avalanche Detectors for characterization of therapeutic proton beams

Innovative silicon sensors with moderate internal gain (Low Gain Avalanche Detectors, LGAD) are promising devices for monitoring and characterization of therapeutic proton beams, overcoming the limitations of ionization chambers typically used for these purposes. In particular, properly segmented thin LGAD detectors, thanks to their fast charge collection time (1 ns in 50 um thickness) and high signal-to-noise ratio, can be used to discriminate single ions and count the number of beam particles up to the high fluxes used in therapeutic applications and to monitor the beam profile. In addition, the excellent time resolution of LGAD devices optimized for timing applications (Ultra Fast Silicon Detectors, UFSD) allows to measure the beam energy through time-of-flight techniques,

Results of preliminary tests of 50 um thick LGAD sensors with the proton beams of the CNAO hadrontherapy center of Pavia, Italy (proton fluxes up to 10^9 p/s, FWHM 1 cm) are presented. Waveforms collected from two aligned sensors have been analyzed to evaluate their counting and timing properties. Single beam particles are well separated and the fine time structure of the beam is resolved with nanosecond resolution. The detectors have been characterized in terms of time resolution (<50 ps for single crossing), counting linearity, pile-up probability, signal degradation with the accumulated radiation dose. On the basis of the promising results, dedicated UFSD strip detectors have been produced and custom VLSI readout chips have been designed for therapeutic beam characterization in radiobiological applications.

Speaker: Dr Nicolo' Cartiglia (Istituto Nazionale di Fisica Nucleare (INFN), Torino, Italy)

21:09 A High-Granularity Timing Detector (HGTD) in ATLAS: Performance at the HL-LHC

The expected increase of the particle flux at the high luminosity phase of the LHC (HL-LHC) with instantaneous luminosities up to L ≃ 7.5 × 10^{34} cm^{−2} s^{−1} will have a severe impact on the ATLAS deetctor performance. The pile-up is expected to increase on average to 200 interactions per bunch crossing resulting in a vertex density that can be larger than 1.5 per mm.
The reconstruction and performance for electrons, photons, jets and transverse missing energy will be severely degraded in the end-cap and forward region, where the liquid Argon based electromagnetic calorimeter has coarser granularity compared to the central region. The High Granularity Timing Detector (HGTD) is proposed in front of the liquid Argon end-cap calorimeters for pile-up mitigation. Using the high granularity and the excellent timing capabilities of the detector with 30 ps per MIP, electron and jet reconstruction (b tagging) are presented as well as the impact on the pileup jet suppression and missing ET. The expected improvement in performance is particularly relevant for vector-boson processes.

Speaker: Corentin Allaire (Université Paris-Saclay (FR))

HGTD_poster_HSTD.pdf

21:10 A timing detector for the SHiP experiment

SHiP is a proposed general purpose fixed target experiment to be located at the CERN SPS accelerator. A fixed target station will be followed by magnetic shielding to reduce beam induced background, a dedicated tau neutrino detector and a detector to seach for hidden particles beyond the Standard Model. Background taggers and a dedicated timing detector will ensure sufficient background rejection. The timing detector is required to have a timing resolution of 100 ps or less in order to reduce combinitorial di-muon background to an acceptable level. A proposed option for such a timing detector consists of plastic scintillating bars read-out on each end by silicon phtomultipliers, which is the focus of this study. Test beam results comparing different bar geometry and material type, different number of silicon photomultipliers on either end of the bar, as well as a new ASIC used for read-out are presented and discussed.

Speaker: Christopher Betancourt (Universitaet Zuerich (CH))

21:11 A high angular resolution silicon microstrip beam telescope for crystal channeling studies

A charged particle telescope has been developed for data taking by the UA9 collaboration at high rates in the CERN H8 beam line using protons and other particles at up to 400 GeV/c. It uses ten planes of silicon microstrip sensors, arranged as five pairs each measuring two coordinates, with an active area of 3.8 x 3.8 cm2. It provides excellent angular and spatial resolution for measuring trajectories of incident and outgoing particles. The apparatus has a baseline of approximately 10 m in each arm, and achieves an angular resolution of 5.2 µrad, limited by multiple scattering in the sensor layers. The sensors are instrumented by a system based on the electronic readout chain developed for the CMS Tracker and a simplified version of the data acquisition software, to provide almost deadtime-free operation at trigger rates of up to 9 kHz.

The telescope was developed to characterize silicon crystals used in channeling experiments with a primary objective to validate them for use in a future LHC beam collimation system. Channeling is a well-established phenomenon whereby a charged particle is confined by the strong electrostatic potential well between crystalline planes; by bending the crystal a parallel particle beam, or its halo, can be steered in a selected direction and hence used for efficiently reducing the LHC beam halo. A series of measurements of such crystals have been carried out over several years, and a prototype beam collimation system was installed in the LHC in 2016. Meanwhile, the telescope has also been used for other studies of fundamental phenomena associated with the channeling process.

The telescope will be described, including sensors, readout, electronic hardware and software, and its measured performance, referring to results from channeling measurements. The application of crystals to LHC beam collimation will be summarized and other innovative results from measurements reported.

Speaker: Geoff Hall (Imperial College (GB))

Hall_HSDT11.pdf

21:12 Studies of uniformity of 50 um UFSD sensors at the Fermilab test beam

We report measurements of uniformity of time resolution, signal
amplitude, and charged particle detection efficiency across the sensor surface
of Ultra-Fast Silicon Detectors (UFSD). Comparisons of performance of sensors
with different doping concentrations, and different active thicknesses are
presented, as well as their temperature dependance and radiation tolerance up to
$6\times 10^{14}$~n/cm$^2$. Results were obtained during Spring 2017 campaign at the Fermilab test beam
facility using 120 GeV proton beams, and a high precision pixel tracking
detector. UFSD sensors based on the Low-Gain Avalanche Detector (LGAD) design
were manufactured by the the Centro Nacional de Microelectr`onica (CNM) and
Hamamatsu Photonics (HPK) were tested in the experiments. The uniformity of the
sensor response in pulse height, efficiency and timing resolution were found to
be good pre-radiation, with time resolution around 30-40 psec depending on
operating conditions. A ``no-response'' area between pads which exhibitwas
measured to be around 70~$\mu$m for CNM and 110$\mu$m for HPK sensors. After a
neutron fluence of $6\times 10^{14}$~n/cm$^2$ the CNM sensor exhibits a large
gain variation of a factor 2.5 when comparing metallized and non-metallized
sensor areas. Irradiated CNM sensor achieved time resolution of 30~psec for the
metallized part, and 40~psec for the non-metallized area, while the time
resolution of the HPK sensor was measured to be 30~psec.

Speaker: Artur Apresyan (Fermi National Accelerator Lab. (US))

Hiroshima_v3.pdf

21:13 Detection of High Flux Synchrotron Radiation Based on Diamond Detector for HEPS

High Energy Photon Source (HEPS) with a beam energy of 6GeV and emittance less than 1.0nm·rad will be constructed in China, which can provide high-brilliance hard X-ray in the order of 1013. The broadband and high-flux monochromatic beam flux and white beam flux need new detector other than the ion chambers for measurement in case of saturation under high-flux conditions.
Diamond X-ray detector for the beam position monitoring and high flux X-ray detection is developing for High Energy Photon Source in China. The diamond detector is designed with multilayered structure to realize the function of beam position monitoring and X-ray intensity measuring. The first layer is the four-quadrant-like position-sensitive device and the other layers are fabricated to single pixel for X-ray intensity measuring. The diamond detector has advantages over other detector materials: a low atomic number resulting in a low absorption cross-section when used as beam position monitor and a high radiation and wide linear range when used as beam intensity measuring. The polycrystalline chemical-vapor-deposition diamond detectors with aluminium contact have been tested at 1W2B beamline at Beijing Synchrotron Radiation Facility (BSRF).

Speaker: Dr ZHENJIE LI (Institute of High Energy Physics, CAS)

diamond detector poster.pdf

diamond detector poster.pptx

21:14 Signals from fluorescent materials on the surface of silicon micro-strip sensors

For the High-Luminosity Upgrade of the Large Hadron Collider at
CERN, the ATLAS Inner Detector will be replaced with a new, all-silicon
tracker. In order to minimise the amount of material in the detector,
circuit boards with readout electronics will be glued on to the active area of
the sensor. Several adhesives investigated to be used for the construction
of detector modules were found to become fluorescent when exposed to UV
light. These adhesives could become a light source in the high-radiation
environment of the ATLAS detector.

The effect of fluorescent material covering the sensor surface in a high-
radiation environment has been studied for a silicon micro-strip sensor
using a micro-focused X-ray beam. By pointing the beam both inside the
sensor and parallel to the sensor surface, the sensor responses from direct
hits and fluorescence can be compared with high precision.

This contribution presents a setup to study the susceptibility of silicon
strip sensors to light contamination from fluorescent materials and shows
their impact on the noise and fake signal rate of a sensor operated in a
high-radiation environment.

Speaker: Dennis Sperlich (Humboldt University of Berlin (DE))

fluorescence.pdf

21:15 Optical transceiver in miniature form factor for radiation hazard applications

Optical transceiver provides high speed data transmission using low mass fibers over a long distance in applications of detector readout. A miniature form factor is favorable for compactness in detector design. We report on a chip-on-board transceiver assembly of 2 mm in height, with bare-die opto-electronics and driver ASICs of 10 Gbps aligned within a light coupling prism. The active opto-electronics of 850 nm VCSEL and PIN diodes are commercial products being evaluated for radiation tolerance to the order of $1\times10^{15}$ (1 MeV) n/cm$^2$. New driver ASCIs are developed for radiation hardness in TSMC 65 nm technology. The light coupling prism made of Polyether Imide (PEI) shows negligible attenuation after being irradiated by Co$^{60}$ gamma-ray to 100 kGy. The alignment of VCSELs and PINs to the prism lenses is fabricated in an automatic assembly of better than 5 μm precision and the fixture is adhered by fast cure epoxy. Light coupling efficiency is investigated for the VCSEL light emission modes in far field angle and the temperature dependence. Ageing effects are investigated in 85$^o$C, 85% RH burn-in tests for the assemblies and the VCSELs characteristics to more than 3000 hours. The ageing effects vary between VCSELs of different manufacturers. With qualified electronic components, the assembly will sustain applications in a radiation hazard environment.

Speaker: Dr S. Hou (Academia Sinica (TW))

HSTD11_poster_20171210_v8.pdf

21:16 Development of CVD Diamond Detectors and Performance of Neutron Testing

This study presents the design and development of the Chemical Vapor Deposit (CVD) diamond detector that applies to detect the neutron radiations. The implementation of a neutron detector in a thin CVD diamond film has several advantages as radiation hardening, fissile-material free, low gamma sensitivity, compact and solid state, spectroscopic, both thermal and fast neutron detection, especially when using external “blankets” to convert the neutrons into detectable charge particles. There are thermal and fast neutron detectors were developed as Gd and Ag neutron detectors, respectively. Beside it, the simultaneous detector was fabricated that can detect both of thermal and fast neutron radiations. Based on the design and calculation, the thin film deposition of Gd and Ag electrodes were determined as 4 µm and 150 nm, respectively. The performance testing to characterize the response of CVD diamond detectors has been carried out at the KIGAMS MC-50 Cyclotron having a 30 MeV proton energy and 10 µA current, which is an accelerator based neutron sources with the high neutron flux about 1x10⁴ ~1x10⁶ n.cm^-2.s^-1. The detector counting efficiency and energy resolution were accordingly derived as a function of the thickness of the 6LiF and CVD diamond layers, both for thermal and fast neutrons, thus allowing us to choose the optimum detector design for any particular application. Comparison with experimental results is also reported.

Keywords: CVD Diamond, Neutron, Radiation Detection.

Speaker: Dr Sy Minh Tuan HOANG (Duy Tan University)

21:17 Digital Electromagnetic Calorimetry for future colliders

A Digital Electromagnetic Calorimeter (DECAL) is a highly granular device, which counts the number of particles in a shower rather than the total energy deposited. The required ultra-high granularity (50x50μm2) can be achieved using radiation hard CMOS Monolithic Active Pixel Sensors (MAPS).

We will present simulated results for the optimisation of a DECAL at future colliders (ILC/CLIC/FCC-hh). Particular focus will be on single particle resolutions, the impact of pile-up at hadron colliders and its reduction, and reconstruction algorithms to extract the additional shower information available from such a highly segmented detector. We will also present an overview, and initial measurements, of a radiation hard MAPS designed for such a calorimeter.

Speaker: Tony Price (University of Birmingham (GB))

decal_poster_pricet_v4.pdf

21:18 Development of a System for Luminosity and Abort at the LH-LHC based on polycrystalline CVD diamond

The High Luminosity upgrade of Large Hadron Collider (HL-LHC) will increase Large Hadron Collider Luminosity by an order of magnitude increasing the density of particles on the detector by an order of magnitude as well. For protecting the inner detectors of experiments and for monitoring the delivered luminosity a radiation hard beam monitor is being developed. We propose a set of detectors based on poly-crystalline Chemical Vapor Deposition (pCVD) diamonds and dedicated Application Specific Integrated Circuits. Due to the large range of particle flux through the detector, flexibility is very important. To satisfy the constraints imposed by the HL-LHC we propose a solution based on segmenting each single diamond sensor into multiple devices of varying size and reading them out with a new multichannel readout chip.

In this talk we describe the proposed system and present results from the first prototypes of multichannel pCVD diamond sensors with devices ranging in area from approximately 1mm^2 to approximately 32mm^2 readout with a prototype FE amplifier chip. The prototype system was characterized in test beams with 120 GeV hadrons at the CERN SPS. Preliminary results in measuring the amplitude distribution across the pad area will be presented at different negative and positive voltages from 1V/um to 2V/um. In addition the noise distribution and efficiency for measuring single MIPs was determined. Based on the preliminary results a proposal for further development of the system will be discussed.

Speaker: Bojan Hiti (Jozef Stefan Institute (SI))

21:19 High Spatial Resolution Small Angle X-ray Scattering Experiments using the SOPHIAS Detector

Small angle X-ray scattering (SAXS) is a powerful tool for material and biological science. SAXS is a method to measure the scatterings at small scattering angles, typically 0.1~10 °. The high spatial resolution SAXS data can be obtained by changing experimental setup as follows; enlarging a distance between a sample and a detector position, employing X-ray with lower energy (longer wave length) or using a higher-resolution detector. The large experimental hutch is required for enlarging a camera distance. The light source and optical system for generating low-energy X-ray are also needed if one uses low-energy X-ray. Thus, in order to conduct the high spatial resolution SAXS experiments, it is the most simple to exchange a detector having high resolution. In this presentation, we used the SOI photon-imaging array sensor (SOPHIAS) detector to investigate the nanometer-scale complicated structure observed in polymer materials. An experimental comparison of data quality obtained from the SOPHIAS and the PILATUS3 detector was carried out. It was found that the SAXS profile obtained from the SOPHIAS detector showed higher quality than PILATUS3.

Speaker: Dr Hideaki Takagi (KEK)

21:20 Application of a monolithic SOI pixel detector to evaluation of strength of industrial materials

One of the authors, Sasaki, developed a new equipment for X-ray stress measurement in 2011 which was based on so-called the cosα method, and showed that the weight of the equipment, the occupied space and the measuring time were advanced to about 1/20, 1/15, and 1/10 respectively compared with the ordinary machines. The accuracy of the stress obtained was also found to increase because of the fact that the acquisition number of X-ray diffraction data is about 70 times more than that obtained with the ordinary machines. An image plate (IP) was used in the equipment as a two-dimensional X-ray detector, and it takes about 30 to 120 seconds for X-ray exposure and about 30 seconds for the data analysis. In this study, a monolithic SOI pixel detector (SOI detector) was used instead of an IP in order to reduce the measuring time of the DS-ring. The SOI detector was developed by one of the authors, Arai, which is made from a silicon wafer. In this study, the authors succeeded in measuring the stress of a steel sample with CrKα radiation. It was found that it takes one second for stress determination which is about 1/60 shorter than the equipment with an IP. The outline of the both equipment, IP-use and SOI-use X-ray stress measurement machines, as well as their comparison will be showed with some experimental data in this paper.

Speaker: Prof. Toshihiko Sasaki (Kanazawa University)

21:21 Improvements of Grating-based X-ray Phase Contrast Imaging with a Microfocus X-ray Source by a SOI Pixel Detector, SOPHIAS

X-ray absorption radiography with a microfocus x-ray source plays an important role in a variety of fields, including industrial application, materials science, and biology, because it enables nondestructive observation of the inside of materials in high spatial resolution. Recently x-ray phase-contrast imaging (XPCI) and small-angle scattering (SAS) imaging have been demonstrated using several techniques to enhance the contrast of light element materials. Among them, the method utilizing a single-amplitude grating is very attractive, because we can freely set optical parameters such as source-grating and grating-detector distances independent of x-ray energy.
In this paper, we demonstrate two improvements of this method utilizing the advantages of a silicon-on-insulator (SOI) pixel detector, SOPHIAS[1]. The detector enables to estimate the energy and incident position of individual x-ray photons. One is single-exposure energy-resolved XPCI, and the other is the improvement in spatial resolution of SAS imaging. In the XPCI, absorption and phase-contrast images of polymethyl methacrylate (PMMA) and Si spheres were obtained for 8- and 15-keV x-rays from single-exposure data, which is very useful in material characterization. Analyzing electric charge generated by x-ray photon irradiation near pixel boundary improved spatial resolution of SAS images in addition to the enhancement of signal-to-noise ratio of XPCI.
[1] T. Hatsui et.al., Proceedings of International Image Sensor Workshop, Article 3.05 (2013).

Speaker: Ryo Hosono (Osaka University)

P82R.Hosono.pdf

21:22 Linear mode reach through APD for X-ray imaging in 0.2μm SOI-CMOS technology

Prototype of an Avalanche Photodiodes with Reach-Through (RT-APD) was
fabricated using Silicon On Insulator (SOI) technology. It replaces a pixel sensor with
the silicon APD to detect soft X-ray which generate very small charge. These new
devices offer fast proportional response and good S/N based on linear mode operated at
below breakdown voltage. In this study, to investigate edge termination effect, the
RT-APD prototype was fabricated and the results of current-voltage characteristics with
different guard ring width and also photon sensitivity in order to evaluate multiplication
gain were measured. These RT-APD sensors are composed of N+/P-well/P-substrate.
The wafer type is floating zone with 200 μm thick and its resistivity is around 6k Ωcm.
Potential and electric field distribution was also analyzed with TCAD simulation.

Speaker: Ryutaro Hamasaki (SOKENDAI)

HSTD11&soipix2017_hamasaki_poster.pdf

21:23 Proton Radiation Damage Experiment for X-ray SOI Pixel Detectors

X-ray Charge Coupled Devices (CCDs) are commonly used in modern X-ray astronomical satellites. Although the CCDs have good energy resolution, they have poor time resolution (a few seconds). Therefore we have been developing XRPIX which is a monolithic active pixel sensor based on Silicon On Insulator (SOI) CMOS technology for future satellites. XRPIX has time resolution shorter than 10 $\mu{\rm s}$. Furthermore, XRPIX has similar energy resolution to the CCDs because of small parasitic capacitance owing to SOI technology.
In low earth orbit, there are many cosmic rays which are composed primarily of high energy protons. By interacting with the cosmic rays, semiconductor detectors are damaged, and their performance such as energy resolution gets worse. Thus, to examine their radiation hardness is one of important issues.
We used heavy ion accelerator at National Institute of Radiological Science in Chiba to perform our proton radiation damage experiment for XRPIX. We irradiate $6~{\rm MeV}$ proton to XRPIX2b-FZ. With $410~{\rm rad}$ irradiation, whose equivalent time in orbit is 3.5 years, degradations of gain and energy resolution are less than $0.4\%$ and $10\%$, respectively.
After more proton irradiation, specifically at $6000~{\rm rad}$, gain increases by $1\%$ and energy resolution gets worse by $10\%$ than those with no damage. In addition, a fraction of bad pixels, whose read out noise is worse than $3\sigma$ of the average noise of all pixels, increases from $0.4\%$ at 0 rad to $2.5\%$ at $6000~{\rm rad}$.

Speaker: Mr Keigo Yarita (Tokyo University of Science)

HSTD_poster_English.pdf

21:24 X-ray response evaluation in subpixel level for X-ray SOI pixel detectors

We have been developing X-ray SOIPIX detectors named XRPIX for future X-ray astronomical satellites. SOIPIX is the CMOS pixel sensor with Silicon On Insulator (SOI) technology. XRPIX can detect the hard X-ray photons up to a few tens of keV thanks to its thick depletion layer with a thickness of a few hundreds of $\mu$m. Moreover, it has a high time resolution of a few $\mu$s and a moderate energy resolution comparable to that of CCDs. In our previous work using the prototype XRPIX named XRPIX1b_FZ with 500 $\mu$m thick depletion layer, we found that detection efficiency in subpixel is not uniform by irradiating 17.7 keV energy X-ray to the front side (circuit layer side of XRPIX) of the device at SPring-8. Relative detection efficiency compared to the highest efficiency at center area of a pixel is $95.6\pm2.9\%$ at boundary with the adjacent pixel, and $79.4\pm2.4\%$ at intersection of pixel boundaries (corner of a pixel). According to the electric field simulation, this phenomenon results from the electric field structure in the sensor layer. Then, we developed a device with a new pixel circuit layout in order to improve the charge collection efficiency. In this study, we evaluate the uniformity of detection efficiency in subpixel level using the newly developed XRPIX named XRPIX3b_FZ with 310 $\mu$m thick depletion layer. We scanned the device with a step size of 6 $\mu$m by irradiating monochromatic soft X-ray collimated beam size of 4 $\mu$m at KEK photon factory. As a result, relative detection efficiency at 5 keV energy X-ray compared to the center of a pixel is $98.4\pm3.5\%$ at boundary of two pixels, and $96.3\pm3.9\%$ at corner of a pixel. Therefore, we confirmed the improvement of the variation of the detection efficiency in the device with new circuit layout. In this presentation, we will also report the uniformity of gain and energy resolution in subpixel level.

Speaker: Mr Kousuke Negishi (Tokyo University of Science)

HSTD11_Poster_Negishi.pdf

21:25 Design and Development of an Event-driven SOI Pixel Detector for X-ray Astronomy

We have been developing monolithic active pixel detectors based on the silicon-on-insulator (SOI) pixel technology, named “XRPIX”, for future X-ray astronomical satellite missions. The XRPIX series offers good time resolution (~1 ${\rm \mu}$s), fast readout time (~10 ${\rm \mu}$s), and wide energy range (0.5–40 keV) in addition to having imaging and spectroscopic capabilities comparable to charge coupled devices (CCDs) which are current standard detectors. A comparator circuit in each pixel is also implemented in order to output hit trigger (timing) and two-dimensional hit-pattern (position) so that signals are read out only from X-ray-detected pixels. X-ray readout by this function is called “event-driven readout”.
We have designed many types of devices to realize event-driven readout and improve performance. In our previous studies, we successfully demonstrated the event-driven readout using small-area devices. We designed the first prototype of a large-area device for satellite loading. The device is 24.6 mm ${\rm \times}$ 15.3 mm in size and consists of 608 ${\rm \times}$ 384 (= ~233k) pixels. The pixel size and the imaging area are 36 ${\rm \mu}$m ${\rm \times}$ 36 ${\rm \mu}$m and 21.9 mm ${\rm \times}$ 13.8 mm, respectively. We have introduced a data processing circuit to obtain pattern information of detected events. This circuit allows us to determine the event type within several operating clocks. We report on the design architecture and evaluation results of the large-area device in the event-driven readout.
We also fabricated a different device with a new pixel structure using Double-SOI wafer to improve the X-ray spectroscopic performance. It is evaluated in the frame readout mode, which reads all pixels periodically analogous to CCDs. We finally achieved the readout noise of about 10 e${\rm ^{-}}$ (rms) and the energy resolution of about 190 eV (FWHM) at 6 keV.

Speaker: Dr Ayaki Takeda (University of Miyazaki)

20171210_SOIPIX2017_takeda_v3.pdf

21:26 Evaluation of Kyoto's Event-Driven X-ray Astronomical SOI Pixel Sensor with a Large Imaging Area

We have been developing monolithic active pixel sensors, named "XRPIX", based on the silicon-on-insulator (SOI) pixel technology for future X-ray astronomy satellites. XRPIX has the function of event trigger and hit address outputs, which allows us to read out analog signals only of hit pixels on trigger timing. Thus, XRPIX offers a good time resolution better than 10 $\mu{\rm s}$ and a high throughput reaching > 1 kHz. The non-X-ray background can also be significantly reduced by applying the anti-coincidence technique. Recently, we processed "XRPIX5" with an imaging area of 21.9 mm $\times$ 13.8 mm, a pixel size of 36 $\mu{\rm m}$ $\times$ 36 $\mu{\rm m}$, and the format of 608 $\times$ 384 pixels. XRPIX5 has a larger imaging area than other XRPIX series. In spite of the large size, we successfully obtained X-ray spectra from all regions of XRPIX5 and achieved the spectral performance comparable to previous XRPIX. The energy resolution is $\sim$ 420 eV (FWHM) at 6 keV and the readout noise is $\sim$ 37 $e^{-}$ (rms) in the frame-by-frame readout mode. We also investigate the gain uniformity and the leak current among the pixels. Here, we report the evaluation results of XRPIX5.

Speaker: Mr Hideki Hayashi (Kyoto University)

HSTD11_hayashi_poster_final.pdf

21:27 Investigation of Soft X-ray Performance of Kyoto's Event-Driven X-ray Astronomical SOI Pixel Sensor, XRPIX

We have been developing event-driven X-ray Silicon-On-Insulator (SOI) pixel sensors, called "XRPIX'', for next generation X-ray astronomy satellites. XRPIX is a monolithic active pixel sensor and fabricated using the SOI CMOS technology. X-ray CCDs are currently used as the standard imaging spectrometers for X-ray astronomy satellites. However, CCDs suffer from problems such as a poor time resolution (a few seconds). XRPIX has the event trigger output function, and to read out only X-ray event pixels we can get a higher time resolution (~ 10 $\mu{\rm s}$). To observe X-rays in a wide energy band, we have been developing back-illuminated type of XRPIX with a thin dead layer ($\leq$ 1 $\mu{\rm m}$) on the backside. We already achieved a 0.5 $\mu{\rm m}$ dead layer with XRPIX3b. In order to achieve an even thinner layer, we produced XRPIX6bD. On the backside of the sensor layer, ion implantation, laser annealing, and vapor-deposition of aluminum (200 ${\rm nm}$) for optical blocking are processed. We suppressed the ion implantation energy to reduce the dead layer thickness. First, we search the energy resolution and readout noise, and found that the readout noise is $\sim$ 12 e$^{-}$ (rms) and the energy resolution is $\sim$ 290 eV (FWHM) at 6.4 keV. Here, we report the evaluation results of XRPIX6bD.

Speaker: Mr Sodai Harada (Kyoto University)

SOIPIX2017_poster_harada_v5.pdf

21:28 The ground experiment for development of Multi Image X-ray Interferometer Modules

We propose a new type of astronomical X-ray interferometer without using mirrors. The structure is very simple, consisting of an X-ray absorption grating and an X-ray spectral imaging detector. Quasi-parallel light from a celestial object passing through the grating makes a self-image of the grating by the Talbot effect. Stacking the image with the grating pitch in the analysis provide the profile of the X-ray object. The angular resolution of the system can be arcseconds or sub-arcseconds, which are difficult to be achieved X-ray mirror systems for satellites. We call this interferometer system Multi Image X-ray Interferometer Module (MIXIM).
We started an experiment using a micro-focus X-ray source, and 4.8 $\rm{\mu m}$ pitch 17 $\rm{\mu m}$ thick Au X-ray absorption grating, and an XRPIX2b detector with a pixel size of 30 $\rm{\mu m}$. We employed charge sharing analysis to achieve finer positional resolution than the pixel size and detected the interference fringes with a magnification factor of 4.4. Our final goal is, however, parallel X-rays from celestial objects, and thus detectors with finer or comparable position resolution as the grating pitch is required. To meet this requirement, we have recently introduced a CMOS sensor developed by Gpix inc. with a small pixel size of 4.25 $\rm{\mu m}$. This device is designed for visible light application, but we irradiated X-rays and find sensitivity for them. We present the current status of these preliminary experiments for MIXIM.

Speaker: Tomoki Kawabata (Osaka University)

kawabata_20171210_SOI_v2KH.pdf

21:29 The general performance of source-follower and charge-preamplifier SOI pixel detectors

The SOI CMOS technology allows to fabricate monolithic pixel detectors in which the readout electronic and the sensor matrix are integrated on the same wafer. Characterization of a device designed in Cracow and produced in Lapis 0.2 $\mu m$ Fully-Depleted, Low-Leakage SOI CMOS technology was performed. The tested matrix consists of two pixel types: source-follower and charge-preamplifier architecture. In addition, the charge preamplifiers are designed with two different sensor layouts. The whole matrix comprises an area of 16 $\times$ 36 squared pixels of 30 micron pitch. The detector is read out in rolling shutter mode.
In this presentation, the performance and measurement results of the prototypes produced on high resistivity floating zone (FZ-n) and novel Double SOI wafers are presented. Using Am$^{241}$ and Fe$^{55}$ radioactive sources the detector calibration was done and the noise was measured, giving the ENC (Equivalent Noise Charge) of about 100 e$^-$. In addition, the leakage currents were measured showing several pA per pixel for FZ(n) and almost zero (below 0.1 pA) for Double SOI.

Speaker: Roma Bugiel (AGH University of Science and Technology (PL))

Roma_Bugiel_HSTD_poster_f.pdf

21:30 Compensation for Radiation Damage to SOI Pixel Detector via Tunneling

We have been developing a method for removing holes trapped in the oxide layer of a silicon-on-insulator (SOI) monolithic pixel detector after irradiation. Radiation that passes through the detector generates positive charge in the buried oxide layer (BOX) underneath the MOSFET. The positive potential caused by these trapped holes modify the characteristics of the MOSFET of the signal readout circuit, especially a negative shift in the threshold voltage $V_{\mathrm{th}}$. In order to compensate for the effect of the positive potential, we tried to recombine the trapped holes with electrons via Fowler-Nordheim (FN) tunneling. By applying high voltage pulse (~0.6 GV/m for 3 s) to a electrode under the BOX with the MOSFET fixed at 0 V, electrons were injected into the BOX by FN tunneling. We irradiated test element groups of MOSFETs with $^{60}{\rm Co}$ $\gamma$-ray up to 2 MGy. These MOSFETs are processed on a double SOI wafer. The double SOI wafer has middle Si layer in the BOX, and this middle Si is used as the electrode for applying high voltage pulse. In this presentation, recent results on the above samples will be reported.

Speaker: Miho Yamada (KEK)

21:31 A monolithic mid-infrared image sensor with SOI technology

Conventional mid-infrared (MIR) image sensors consist of infrared sensitive detector and readout integrated circuit (ROIC) with pixel-to-pixel interconnection such as Indium bump. This hybrid architecture provide us choices of sensor materials while the size of pixel and the amount of stray capacitance are limited by the hybridization. Here we propose a monolithic mid-infrared image sensor by the silicon-on-insulator monolithic pixel detector technology (SOIPIX). The detection of the infrared photon is done by the shallow energy band gap of the buried impurity doping in the high-purity handle wafer. Direct via connection to the top silicon ROIC will realize smaller pixel size and stray capacitance compared with those of hybrid sensors. Together with the native cryogenic operation of FD-SOI CMOS, the monolithic MIR image sensor will provide us fast and low-noise imaging with full-advantages of the CMOS ROIC in the mid-infrared wavelength.

Speaker: Dr Takehiko Wada (ISAS/JAXA)

21:32 R&D status of SOI based pixel detector with 3D stacking readout

We have been developing pixel detectors based on the silicon-on-insulator (SOI) technology for the particle tracking. SOI sensor technology provides ideal monolithic pixel detector thanks of fully-depleted sensor wafer integrated with high performance CMOS readout circuit. The "Sofist1" pixel sensor with 20$\mu$m$ \times $20$ \mu $m pixel size has been tested successfully. One remaining issue is to improve the read out circuit tolerable for the high-luminosity collider environment. Recently, we introduced a new 3D stacking method to the SOI sensor, Sofist4, where a comparator and 3-stage charge and time memory cells are integrated in individual 25$\mu$m$ \times$25$\mu$m pixel. In this presentation, the design and expected performance as well as the future plans will be presented.

Authors:
Toru Tsuboyama, Shun Ono, Miho Yamada, Yasuo Arai, Manabu Togawa, Ikuo Kurachi, Kazuhiko Hara, Yoichi Ikegami, Akimasa Isikawa

Speaker: Toru Tsuboyama (KEK, High Energy Accelerator Research Organization)

22:00 → 23:00 Busses: One-off airport pick-up bus service (Tentative departure time: 22:00)

Monday 11 December

08:00 → 09:00 On-site Registration

08:10 → 08:40 Busses: 8:10-8:40 Rizzan to OIST

09:00 → 10:35 Session1

Convener: Yoshinobu Unno (High Energy Accelerator Research Organization (JP))

09:00 Introduction

Speaker: Yoshinobu Unno (High Energy Accelerator Research Organization (JP))

Introduction171211_R0.pdf

09:10 Welcome address

Speaker: Prof. Hirotaka Sugawara (OIST)

09:20 Introduction to OIST

Speaker: Youhei Morita (OIST)

OIST_Introduction_HSTD171211.pdf

OIST_Introduction_HSTD171211.pptx

09:35 The HL-LHC experiments

The talk will discuss the experiments planned for the High Luminosity LHC with dedicated focus on the silicon based systems. The special aspects to cope with the new environment and its challenges, e.g. very high radiation and very high instantaneous luminosity thus high pile-up, high occupancy and high data rate will be addressed. In this context, also exiting topics like Tracker, high granularity silicon-based calorimetry, fast timing and new triggers will be described.

Speaker: Frank Hartmann (KIT - Karlsruhe Institute of Technology (DE))

HartmannHST2017.pptx

10:05 Overview of sensor radiation tolerance at HL-LHC levels

Radiation damage effects in silicon sensors were extensively studied during LHC construction. These studies concentrated mostly on silicon sensors of n-type and led not only to reliable prediction of sensors operation by parametrizing damage effects at LHC, but also to ways of improving radiation hardness detectors by defect engineering (oxygenated detectors). Understanding the radiation hardness effects in silicon at HL-LHC cannot be achieved simply by extrapolating the effects and concepts measured at fluences <~1e15 cm-2. Also alternative ways of using characterization techniques are required for determining the detector properties.

Although silicon detectors with segmented n+ electrodes (usually p-type detectors) with proper choice of geometry and technology (thin planar, 3D, HV-CMOS…) offer successful operation even beyond few 1e16 cm-2, not all aspects of detector operation is fully understood. Moreover, the use of segmented silicon detectors with gain in timing applications changes in many ways the radiation damage paradigm.

In the presented work radiation effects determining the operation of detectors at HL-LHC fluences will be reviewed. An emphasis will be given to electric field modelling, effects of impact ionization, trapping and mobility changes with irradiations. Effective acceptor removal, which importantly influences performance of novel detector concepts (HV-CMOS, LGAD) will also be addressed.

Speaker: Gregor Kramberger (Jozef Stefan Institute (SI))

Kramberger-RadHard-Final.pdf

10:35 → 11:05 Coffe/Tea break with Poster session: Posting posters

11:05 → 12:35 Session2

Convener: Xinchou Lou (University of Texas at Dallas (US))

11:05 Monolithic CMOS sensors for high energy physics

Monolithic pixel detectors integrating sensor matrix and readout in one silicon die are making their way into high energy physics as they potentially offer lower material budget and cost, and better performance. For the most extreme radiation levels, signal charge has to be collected by drift from a depletion layer onto a designated collection electrode without losing the signal charge elsewhere in the in-pixel circuit. Low power consumption requires optimization of Q/C, the ratio of the collected signal charge over the input capacitance. Progress is being made both in the area of radiation tolerance and low power consumption. Further challenges come from the extreme hit rates and system requirements and require careful choice of architecture to fully take advantage of present CMOS technologies. This paper tries to give an overview.

Speaker: Dr Walter Snoeys (CERN)

W_Snoeys_HST2017.pdf

11:35 Overview of the X-ray detectors for photon science experiments

Last decade has seen tremendous advancements in the development of x-ray detectors for photon science. Driven by the construction of new and upgrades of existing light sources and building on the experience of related instrumentation fields, detector for photon science have reached level of complexity and performance unimaginable a few years ago. This talk will provide an overview of current developments and future trends.

Speaker: Dr Gabriella Carini (SLAC National Accelerator Laboratory)

12:05 Overview of the X-ray astronomical imaging detectors

An astronomical X-ray imaging system combining an X-ray mirror and an X-ray imager began with the Einstein observatory launched in 1978. In this satellite, an imaging proportional counter was used as the focal plane detector of the Wolter type I X-ray focusing mirror. Following the Einstein observatory, ROSAT, ASCA and BeppoSAX were equipped with imaging gas counters.
In order to improve the spectral performances, a photon counting type of X-ray CCD camera was developed. ASCA is the first X-ray satellite equipped with an X-ray CCD camera and opened a new era of X-ray astronomy. Along with the progress of the development of X-ray mirrors, X-ray CCDs having a larger formant, a thick depletion layer and backside illumination were developed and used as the formal plane detectors of the Chandra, XMM-Newton, Suzaku and Hitomi satellites. An X-ray CCD is the standard imager of modern X-ray astronomical satellites in orbit.

The weak point of X-ray CCD is its low readout speed. X-ray CCD is unable to observe a bight X-ray source because of the pile-up problem. Therefore, several types of active pixel sensors with fast readout, DEPFET, pnCCD, Hybrid, bulk CMOS, and CCD with CMOS readout, are being developed for future X-ray satellites equipped with X-ray mirrors having large collecting area and high angular resolution.

Non-X-ray background due to cosmic-rays in orbit is the major problem for the imaging spectroscopy in the X-ray energy band above 10 keV, Anti-coincidence with the shield counters is used to reduce the background. This technique requires the imagers to be equipped with a time resolution higher than 10 usec. Thus, the double-sided silicon strip detectors (DSSD) and SOI pixel detectors with the event-driven readout have been developed. The cross-section of photoelectric absorption in silicon is smaller than that of Compton scatter​​ above 50 keV. CdZnTe and CdTe detectors are standard in the energy band. CdZnTe pixel detectors and hybrid detectors of DSSD and CdTe and realized in orbit by NuSTAR and Hitomi, respectively.

Speaker: Takeshi Tsuru (Kyoto University)

20171211_SOIPIX2017_XrayAstroDetector_v7_open.pdf

12:35 → 14:00 Lunch break with Poster session: free presenter attend.

Lunch box is prepared for all participants; Eating inside the meeting rooms in the annex or outside the building.

14:00 → 15:50 Session3

Convener: Philip Patrick Allport (University of Birmingham (UK))

14:00 Current status of Hamamatsu Si detectors mainly for High Energy Physics Experiments

We have been developing various types of Si detectors for HEP(High Energy Physics) Experiments.
Hamamatsu SSD(Silicon Strip Detectors) has been used as a tracking detector in many collider experiments [ATLAS, CMS, BELLE, etc.] and space experiments [ FGST(GLAST), AGILE, etc.].
Hamamatsu APD(Avalanche Photo Diodes) is used as a photo detector of PWO4 scintillator in the CMS electromagnetic calorimeter.
Hamamatsu MPPC (Multi-Pixel Photon Counter, Hamamatsu trade mark) is one of the detectors called Si-PM(silicon photomultiplier), and it matches well for detecting weak emission of scintillator or Cherenkov light etc. For example, MPPC has been used for T2K experiment, and is under preparation for MEG experiment and CTA experiment.
As a new effort, we are also developing large-area Si PAD detectors by using 8-inch wafer process, for the calorimeter of next experiments like HL-LHC(High Luminosity-LHC) or ILC.
In addition to the above HEP application, APD and MPPC are used for analysis, measurements and medical application(mainly for PET).
In this conference, we will also talk about the status of medical application in addition to talking mainly for HEP.

Speaker: Mr Shintaro Kamada (HAMAMATSU PHOTONICS K.K)

HSTD11th_OIST(HPK Kamada).pdf

14:30 Status and Outlook of Si-Strip-Sensors from Infineon Technologies AG

Infineon Technologies is developping single-sided AC-coupled Si-Strip-Sensors for the Phase-II-Upgrades of both ATLAS and CMS for the HL-LHC. The status and outlook of recent sensor-productions will be presented.

Speaker: Johannes Hacker (Infineon Technologies Austria AG)

HSTD11-Infineon-Technologies-Hacker.pdf

14:50 Fast timing detectors

In this contribution, I will review the growing interest in implementing large area fast timing detectors with a time resolution of 30-50 ps based on low gain avalanche detectors. This interest is spurred as timing information is a very effective tool in pile-up rejection. Large scale high-precision timing detectors face formidable challenges in almost every aspect: sensors performance, their segmentation and radiation resistance, very low power and low noise electronics, cooling, low material budget and large data volume. In my talk I will report on the current status of this new development in detectors for high-energy physics, and its possible use at HL-LHC.

Speaker: Nicolo Cartiglia (INFN Torino (IT))

Timing_NC.pdf

15:20 High Resolution SOI Pixel Detector

Silicon-On-Insulator (SOI) technology is considered to have the most suitable structure for a monolithic pixel detector. It achieved many important performance: less than 1 micron tracking resolution, good energy resolution with 10 electron noise level, radiation hardness of more than 100 kGy(Si), small layout size with PMOS and NMOS active merge, etc.
Overview of the SOI pixel process and detector development will be presented.

Speaker: Prof. Yasuo Arai (High Energy Accelerator Research Organization (JP))

1712OIST_arai_open.pdf

15:50 → 16:20 Coffe/Tea break with Poster session: Presenters of "odd" P# to attend the poster

16:20 → 18:10 Session4

Convener: Marcela Mikestikova (Acad. of Sciences of the Czech Rep. (CZ))

16:20 TCAD for SOIPIX

TCAD simulation is an important tool to understand, design, and evaluate SOIPIX-like devices. In this talk, it is introduced as follows.
- General introduction
 Process simulation
 Device simulation
- Some important TCAD aspects for SOIPIX
 Physical model
 Mixed mode
- Detailed explanations of a simple case study simulation
- Review of some applications to SOIPIX-like devices

After that two recent topics are introduced.
- Automatic differentiation
In order to incorporate new materials, new principles into electronics, much more new physical models are required to be implemented into the device simulator. For numerical convergence of Newton loop in the device simulator, Jacobian matrix elements are necessary, which are automatically incorporated by the automatic differentiation method.
- Domain decomposition method
In order to analyze very large scale problems such as SOIPIX, the numerical matrix to be solved becomes too large. The domain decomposition method is studied on the high performance computing environment in order to reduce the total size of the numerical matrix.
Examples of these new features are also presented.

Speaker: Koichi Fukuda (AIST)

20171211SOIPIXTCAD_open.pdf

16:50 A Versatile Analysis of Surface and Bulk Radiation Damage Effects

Radiation damage effects at High Luminosity LHC (HL-LHC) expected fluences (greater than 2×10¹⁶ n/cm² 1 MeV equivalent) and total ionising doses (TID) (greater than 1 Grad) will impose very stringent constraints in terms of radiation resistance of solid-state detectors.
TCAD tools can be used to study the electric behaviour of different design options, in order to optimize the performance of these detectors in terms of inter-electrode isolation and charge collection properties. A comprehensive modelling approach of the effects of radiation damage on electrical behaviour of silicon detectors at these very high fluences need therefore to be developed and validated over different technology options.
Aiming at the suitability of the approach, the proposed strategy is based on a combined bulk and surface damage effects modelling accounting for a limited number of measurable parameters. In this work, we concentrate in particular on the effects of surface damage on detectors fabricated on p-type substrates by three different vendors, combining these effects with those of bulk damage previously analysed [1]. Actually, starting from standard test structure measurements (i.e. MOS capacitors, gated diodes and MOSFETs), the interface trap state density (N_IT) and the oxide charge (Q_OX) can be extracted for different vendors and used as input parameter to the simulation tools. Test structures under study include MOS capacitors, gated-diodes, fabricated both at Hamamatsu (Japan) and at Infineon (Austria), as well as MOS capacitors, gated-diodes and MOSFETs fabricated at FBK (Italy). Using High-Frequency (HF) and Quasi-Static (QS) C-V characteristics and current-voltage (I-V) measurements, the effective oxide charge density (N_EFF), the surface generation velocity (s₀) and the interface trap density (D_IT) have been determined and compared for the three technologies before and after irradiation with X-rays with doses ranging from 0.05 to 20 Mrad(SiO₂). The separate contributions to the threshold voltage shift due to the fixed oxide charge and the interface trapped charge in MOSFETs can be evaluated using the method proposed by McWhorter et al. [2]. A detailed simulation analysis, varying the previously mentioned parameters, has been carried out, aiming at evaluating the effects of oxide charge density and interface trap density variation with the dose on MOS capacitor capacitances, gated diode currents and interstrip resistance. The separate effects of different types of interface trap states has been considered as well, by singularly varying the total density of donor- and acceptor-type trap states. The effects of different trap energy distributions and capture cross sections have been evaluated within Synopsys Sentaurus TCAD device simulator by means of steady-state, AC and transient analyses. Comparisons have been carried out between simulation findings and available literature data, in particular in terms of charge collection efficiency versus fluence. The good agreement obtained would support the use of the model as a predictive tool to optimize the design and the operation of novel solid-state detectors in the HL-LHC scenario.

[1] F. Moscatelli, D. Passeri, G.M. Bilei, A. Morozzi, G.-F. Dalla Betta, R. Mendicino, “Combined Bulk and Surface Radiation Damage Effects at Very High Fluences in Silicon Detectors: Measurements and TCAD Simulations,” IEEE Trans. Nucl. Sci., vol. 63, no. 5, pp. 2716-2723, 2016.
[2] P. J. McWorther and P. S. Winokur, “Simple technique for separating the effects of interface traps and trapped-oxide charge in metal-oxide-semiconductor transistors,” Applied Physics Letters, vol. 48, pp. 113-135, 1986

Speaker: Dr Francesco Moscatelli (IOM-CNR and INFN Perugia)

Hiroshima2017_Moscatelli_def.pdf

Hiroshima2017_Moscatelli_def.pptx

17:10 The LHCb VELO Upgrade

The Large Hadron Collider Beauty detector is a flavour physics detector, designed to detect decays of b- and c-hadrons for the study of CP violation and rare decays. At the end of Run-II, many of the LHCb measurements will remain statistically dominated. In order to increase the trigger yield for purely hadronic channels, the hardware trigger will be removed and the detector will operate at 40 MHz. This, in combination with the five-fold increase in luminosity necessitates radical changes to LHCb’s electronics with entire subdetector replacements required in some cases. The Vertex Locator (VELO) surrounding the interaction region is used to reconstruct the collision points (primary vertices) and decay vertices of long-lived particles (secondary vertices).

The upgraded VELO modules will each be equipped with 4 silicon hybrid pixel tiles, each read out with by 3 VeloPix ASICs. The silicon sensors must withstand an integrated fluence of up to 8$\times 10^{15} 1 MeV n_eq/cm^{2}$, a roughly equivalent dose of 400 MRad. The highest occupancy ASICs will have pixel hit rates of 900 Mhit/s and produce an output data rate of over 15 Gbit/s, with a total rate of 1.6 Tbit/s anticipated for the whole detector. The detectors are located in vacuum, separated from the beam vacuum by a thin custom made foil. The foil will be manufactured through a novel milling process and possibly thinned further by chemical etching.

An additional challenge is the non uniform nature of the radiation damage, which results in requiring a guard ring design with excellent high voltage control. In addition, the n-in-p design requires the guard ring to be on the chip side making the high voltage reach the vicinity of the ground plane (about 30 $\mu$m apart). This requires a high voltage tolerant setup for irradiated assemblies which can be achieved using a vacuum chamber. The performance of the prototype sensors has been investigated in a test beam in which a dedicated telescope system was created read out by Timepix3 ASICs. Several different tests of the of the sensor prototypes were performed before and after irradiation. A collection of preliminary results will be presented, as well as a comparison of the performance of the different sensor prototypes.

The VELO upgrade modules are composed of the detector assemblies and electronics hybrid circuits mounted onto a cooling substrate, which is composed of thin silicon plates with embedded micro-channels that allow the circulation of liquid CO$_2$. This technique was selected due to the excellent thermal efficiency, the absence of thermal expansion mismatch with silicon ASIC’s and sensors, radiation hardness of CO2, and very low contribution to the material budget. An alternative and more conservative approach is also under development. The front-end hybrid hosts the VeloPix ASICs and a GBTx ASIC for control and communication. The hybrid is linked to the the the opto-and-power board (OPB) by 60 cm electrical data tapes running at 5 Gb/s. The tapes must be vacuum compatible and radiation hard and are required to have enough flexibility to allow the VELO to retract during LHC beam injection. The OPB is situated immediately outside the VELO vacuum tank and performs the opto-electrical conversion of control signals going to the front-end and of serial data going off-detector. The board is designed around the Versatile Link components developed for high-luminosity LHC applications. From the OPB the detector data are sent through 300 m of optical fibre to LHCb's common readout board (PCIe40). The PCIe40 is an Altera Arria10-based PCI-express control and readout card capable of 100 Gb/s data throughput. The PCIe40 firmware is designed as a series of common components with the option for user-specific data processing. The common components deal with accepting the input data from the detector over the GBT protocol, error-checking, dealing with reset signals, and preparing the data for the computing farm. The VELO-specific code would, for example, perform clustering of hits and time reordering of the events scrambled during the readout.

The design of the complete VELO upgrade system will be presented with the latest results from the R\&D. The LHCb upgrade detector will be the first detector to read out at full LHC rate of 40 MHz. The VELO upgrade will utilise the latest detector technologies to read out at this rate using while maintaining the necessary radiation hard profile and minimising the detector material.

Speaker: Kazuyoshi Carvalho Akiba (Federal University of of Rio de Janeiro (BR))

LHCbVeloUpgrade_Hiroshima_v0r3.pdf

17:30 Belle II Silicon Vertex Detector

The Belle II experiment at the SuperKEKB collider is the next-generation flavor factory, which will operate at an unprecedented instantaneous luminosity of 8×10³⁵ cm^-2s^-1, about 40 times larger than its predecessor Belle experiment. Its vertex detector is composed of a two-layer DEPFET based pixel detector (PXD) and a four-layer double-sided silicon microstrip detector (SVD). To achieve a precise vertex reconstruction and excellent low-momentum tracking, even under the harsh background and high trigger rate of 30 kHz, the SVD employs several innovative techniques. To minimize the capacitive noise, 1,748 APV25 ASIC chips that read out signals from 224k strips, are directly mounted on the modules relying on the novel Origami concept. The analog signals from APV25 after digitized by an FADC system are sent to the central DAQ and also to online tracking system based on SVD hits to provide the region of interests to PXD, enabling reduction of the latter data size to achieve the required bandwidth and data storage space. In this talk, we highlight design principles and construction status of the Belle II SVD, before closing with the path towards its integration and commissioning.

Speaker: Koji Hara (KEK, High Energy Accelerator Research Organization)

20171211_HSTD11.pdf

17:50 Silicon pixel-detector R&D for CLIC

The physics aims at the proposed future CLIC high-energy linear e+e- collider pose challenging demands on the performance of the detector system. In particular the vertex and tracking detectors have to combine precision measurements with robustness against the expected high rates of beam-induced backgrounds. The principal challenges are: a point resolution of a few μm, ultra-low mass (~0.2% X0 per layer for the vertex region and ~1% X0 per layer for the outer tracker), very low power dissipation (compatible with air-flow cooling in the inner vertex region) and pulsed power operation, complemented with ~10 ns time stamping capabilities. A highly granular all-silicon vertex and tracking detector system is under development, following an integrated approach addressing simultaneously the physics requirements and engineering constraints. For the vertex-detector region, hybrid pixel detectors with small pitch (25 μm) and analog readout are explored. For the outer tracking region, fully integrated CMOS sensors with high-resistivity substrate are under consideration (HR-CMOS, SOI). Prototypes of readout ASICs implemented in 65 nm CMOS technology with 25 μm pixel pitch have been produced (CLICpix and CLICpix2). Hybridisation concepts have been developed for interconnecting these chips either through capacitive coupling to active High-Voltage-CMOS sensors (CCPDv3 and C3PD) or through bump-bonding to ultra-thin planar active-edge sensors. Recent R&D achievements include results from beam tests with various hybrid assemblies as well as with technology prototypes of integrated CMOS sensors. Simulations based on Geant4 and TCAD are used to validate the experimental results and to assess and optimise the performance of various detector designs. The R&D project also includes the development of through-silicon via (TSV) technology, as well as various engineering studies involving thin mechanical structures and full-scale air-cooling tests. An overview of the R&D program for silicon detectors at CLIC will be presented.

Speaker: Dominik Dannheim (CERN)

CLIC-SiPixelRD_HSTD11_11Dec2017.pdf

18:30 → 19:30 Busses: OIST to Rizzan

Tuesday 12 December

08:10 → 08:40 Busses: Rizzan to OIST

09:00 → 10:30 Session5

Convener: Yasushi Fukazawa (Hiroshima University)

09:00 Pixel Detector Overview

The talk gives an overview of the status and state of the art of pixel detectors in particle physics and reviews current trends and directions of new developments.
In particular high rate and high radiation applications of pixel detectors
like for the LHC Upgrade and developments that offer low material and low cost
will be addressed, including new developments on timing with silicon pad/pixel detectors.

Speaker: Norbert Wermes (University of Bonn (DE))

Wermes_HSTD_171212.pdf

Wermes_HSTD_171212.pptx

09:30 Performance of the CMS Phase 1 Pixel Detector

It is anticipated that the LHC accelerator will reach and exceed the luminosity of L = 2 x10^34 cm^-2s^-1 during the LHC Run 2 period until 2023. At this higher luminosity and increased hit occupancies the Phase 0 CMS pixel detector would have been subjected to severe dead time and inefficiencies introduced by limited buffers in the analog read-out chip and effects of radiation damage in the sensors. Therefore a new pixel detector has been built and replaced the Phase 0 detector in the 2016/17 LHC extended year-end technical stop. The CMS Phase 1 pixel detector features four central barrel layers and three end-cap disks in forward and backward direction for robust tracking performance, and a significantly reduced overall material budget including new cooling and powering schemes. The design of the new front-end readout chip comprises larger data buffers, an increased transmission bandwidth, and low-threshold comparators. These improvements allow the new pixel detector to sustain and improve the efficiency of the current pixel tracker at the increased requirements imposed by high luminosities and pile-up. A new DAQ system has been developed based on a combination of custom and standard microTCA parts. This contribution gives an overview of the design and performance of the CMS phase 1 pixel detector.

Speaker: Bora Akgun (CERN)

borakagun_ph1pixelperfornmance.pdf

borakagun_ph1pixelperfornmance.pptx

09:50 Operational Experience and Performance with the ATLAS Pixel detector

The tracking performance of the ATLAS detector relies critically on its 4-layer Pixel Detector, that has undergone significant hardware and software upgrades to meet the challenges imposed by the higher collision energy, pileup and luminosity that are being delivered by the Large Hadron Collider, with record breaking instantaneous luminosities of 1.3 x 10^34 cm-2 s-1 recently surpassed.
The key status and performance metrics of the ATLAS Pixel Detector are summarised, and the operational experience and requirements to ensure optimum data quality and data taking efficiency are described, with special emphasis to radiation damage experience.

Speaker: Christopher Blake Martin (Ohio State University (US))

PIX_Hiroshema_2017.pdf

10:10 CMS Pixel detector development for the HL-LHC

The LHC is planning an upgrade program which will bring the luminosity up to about 7.5x10$^{34}$cm$^{-2}$s$^{-1}$ in 2027, with the goal of an integrated luminosity of 3000 fb$^{-1}$ by the end of 2037. This High Luminosity scenario, HL-LHC, will present new challenges of higher data rates and increased radiation tolerance for the pixel detector (2x10$^{16}$ neq/cm$^2$, or equivalently 1 Grad, is expected on the inner pixel layer for 3000 fb$^{-1}$ integrated luminosity). To maintain or even improve the performance of the present system, new technologies have to be fully exploited for the so-called Phase-II upgrade. Among them is the future version of front-end chips in 65-nm CMOS by the CERN RD53 Collaboration which supports small pixel sizes of 50x50 or 25x100 μm$^2$ and lower thresholds (~1000 e$^-$). For the development of the appropriate planar pixel sensor, CMS has recently launched a submission of n-in-p sensors on 6 inch wafer with an active thickness of 150 μm at Hamamatsu. The submission consists of physical thinned, direct bonded and deep diffused wafers with p-stop or p-spray isolation. A variety of sensors with and without biasing scheme is designed to match the different read-out chips (RD53A, ROC4Sens, etc.) and first hybrid modules are assembled at Fraunhofer IZM. In this talk, we will present an overview of the Phase II pixel R&D program and report on preliminary results on the HPK submission.

Speaker: Joern Schwandt (Hamburg University (DE))

js_HSTD11_20171202.pdf

10:30 → 11:00 Coffe/Tea break with Poster session: Presenters of "even" P# to attend the poster

11:00 → 12:30 Session6

Convener: Craig Buttar (University of Glasgow (GB))

11:00 The Phase-2 ATLAS ITk Pixel Upgrade

The entire tracking system of the ATLAS experiment will be replaced in 2025 during the LHC Phase-II shutdown by an all-silicon detector called the “ITk” (Inner Tracker). The innermost part of ITk will be a pixel detector containing about 12.5m2 of sensitive silicon. The silicon modules are arranged on 5 layers of stave-like support structures in the most central region and ring-shaped supports in the endcap regions covering out to |η| < 4; a mid-eta region (~1 < |η| < ~2) will be occupied by novel inclined support structures which keep the angle of incidence of high-momentum tracks more closely normal to the sensitive silicon. All supports will be based on low mass, highly stable and highly thermally-conductive carbon-based materials cooled by evaporative carbon dioxide flowing in thin-walled titanium pipes. An extensive prototyping programme, including thermal, mechanical and electrical studies, is being carried out on all the types of support structures.
The HL-LHC is expected to deliver up to 4000fb-1 of Integrated Luminosity; the outer 3 layers of the Pixel Detector must be designed to cope with this level of background radiation but the innermost 2 layers of the detector will be replaced after about 2000 fb-1.
The ITk pixel detector will be instrumented with new sensors and readout electronics to provide improved tracking performance and radiation hardness compared to the current detector. The innermost layer will be populated with 3D-silicon sensors due to their increased radiation hardness and also lower power consumption, which eases thermal demands on the support structures; other layers will use thin planar silicon sensors. Sensors will be read out by new ASICs based on the chip currently being developed by the RD53 Collaboration. The readout chips will be thinned to 150μm or even less to save material.
Servicing the detector reliably within the limited space available, and without introducing excessive amounts of material, is a significant challenge. Data cables must be capable of handling up to 5 Gb/s and must be electrical in nature within the volume of the pixel detector; conversion to optical signals will take place at larger radii where the radiation background is less intense. Serial powering has been chosen as the baseline for the ITk pixel system as it minimises service cable mass; extensive testing is being carried out to prove its feasibility. Attention must also be paid to grounding and shielding in the detector to mitigate cross-talk and common mode noise.
Most of the baseline technological decisions will be taken this year in view of the ITk Pixel TDR to be completed by the end of 2017.
The speaker will present an overview of all of the above.

Speaker: Leonardo Rossi (Sezione di Genova)

okinawa_itk_pixel_Rossi.pdf

11:20 Development of the radiation tolerant fine size planar pixel detector by HPK/KEK

In the recent development of pixel detector for the inner part of ATLAS detector upgrade of the High Luminosity LHC, thin planar pixel detector has been developed. To reduce hit occupancy, pixel size is smaller than currently operating pixel detector in ATLAS and the 2 options, 50um x 50um and 25um and 100um, are considered by the same 50um x 50um pitch readout ASIC. To evaluate the performace of the fine pixel detector, two ways are tested, a) emulated by current ASIC (FE-I4) using un-uniform size of pixel, where two 50um x 250um pixels are splitted to 50um x 50um and 50um x 450um, b) used new ASIC (FE65p2) with full 50um x 50um pitch. The FE65p2 is the prototype ASIC produced by TSMC using 65nm CMOS process while this expected lower noise than FE-I4. In this presentation, basic performance and testbeam results before and after irradiation are presented.

Speaker: Koji Nakamura (High Energy Accelerator Research Organization (JP))

20171212_HiroshimaSympo2017_nakamura.pdf

11:40 Advances in pixel elecronics for experiments with high rate and radiation

Readout chips for the HL-LHC upgrades have to address enormous challenges in terms of data throughput and radiation levels, ionizing and non-ionizing, that harm the sensing and readout parts of pixel detectors alike. Advances in microelectronics and microprocessing technologies now enable large scale detector designs with unprecedented performance in measurement precision (space and time). This presentation will summarize the advances up to this point and expectations for continued development, drawing form the review article currently in the pre-print stage: arxiv 1705.10150.

Speaker: Maurice Garcia-Sciveres (Lawrence Berkeley National Lab. (US))

HSTD11-garcia-sciveres-pixel-chips.pdf

12:10 A SOI Pixel Detector Using Pinned Depleted Diode Structure For High-Energy-Resolution X-ray Imaging and High-Sensitivity NIR Imaging

This paper presents a SOI pixel(SOIPIX) detector using pinned depleted diode structure suitable for high-energy-resolution X-ray imaging and high-sensitivity NIR imaging. The pinned depleted diode(PDD) structure greatly reduces the R-G dark current generation at the SOI back-gate and the read noise thanks to the very small sensing capacitance and improves the charge correction efficiency. This pixel technology is also useful for high-sensitivity near-infrared imaging with fully-depleted substrate, particularly for time-of-flight(TOF) range imaging. An experimental chip shows an excellent pixel performance on low dark current, low noise, and resulting high energy resolution in X-ray imaging. Range measurement is also carried out using the proposed TOF sensor with the PDD-SOIPIX technology.

Authors: Shoji Kawahito (Shizuoka University), H. Kamehama, S. Shrestha, K. Yasutomi, N. Teranishi(Shizuoka Univ.), T. G. Tsuru (Kyoto Univ.), A. Takeda (Miyazaki Univ.), I. Kurachi (KEK) and Y. Arai(KEK)

Speaker: Shoji Kawahito (Shizuoka University)

SOIPIX2017HSTD11_kawahito.pdf

12:30 → 14:00 Group photo + Lunch break with Poster session: free presenter attend.

14:00 → 15:40 Session7

Convener: Vitaliy Fadeyev (University of California,Santa Cruz (US))

14:00 OVERMOS - CMOS Hi-Res MAPS detectors for HEP applications

The OVERMOS project investigates the use of MAPS, fabricated using a standard low voltage and high resistivity substrate 180nm CMOS technology, for tracking and vertexing in HEP applications.
Following a description of the main features of the proposed CMOS technology, which should guarantee high charge collection efficiency even after high level of dose of radiation, we will detail the design of the OVERMOS test pixel structures, which include active pixels, with in-pixel RO electronics, and basic pixel arrays. Alongside, 3D TCAD simulation results related to charge collection and DC characteristics of the pixel structures will be shown.
Next, we will present experimental results for the fabricated OVERMOS test structures, including charge collection efficiency obtained using laser injection, and comparison of performances before and after neutron irradiation.

Speaker: Enrico Giulio Villani (STFC - Rutherford Appleton Lab. (GB))

01_EGV_HSTD11_Dec17.pdf

01_EGV_HSTD11_Dec17.pptx

14:20 Monolithic Pixel Development in TowerJazz 180~nm CMOS for the outer pixel layers in the ATLAS experiment

The upgrade of the ATLAS tracking detector for the High-Luminosity Large Hadron Collider at CERN requires the development of novel radiation hard silicon sensor technologies. Latest developments in CMOS sensor processing offer the possibility of combining high-resitivity substrates with on-chip high-voltage biasing to achieve large depleted active sensor volume. We characterized depleted monolithic active pixel sensors (DMAPS), which were produced in a novel modified imaging process implemented in the TowerJazz 180nm CMOS process\footnote{manufactured by Tower Semiconductor Ltd, Israel} in the framework of the monolithic sensor development for the ALICE experiment. The novel process modification implemented in this technology allows full depletion of the epi layer even after substantial irradiation as expected for the ATLAS High-Luminosity LHC upgrade tracker ``ITk". The required tolerance to non-ionizing energy loss (NIEL) in the outer ATLAS ITk pixel layers is 1.5$\times 10^{15}$1 MeV $n_{eq}/cm{^2}$, two orders of magnitude higher than the ALICE ITS.

The designed sensor aims to minimise the capacitive load on the amplifier and enable fast signal collection, in time for the LHC 25ns bunch spacing. Separating the collection well from digital area allows to decouple analog and digital electronics to further minimize capacitance and prevent cross-talk. The radiation hardness of the charge collection to Non Ionizing Energy Loss (NIEL) has been characterized for the different pixel sensor cell designs. The talk focuses on the charge collection properties measured in the laboratory using radioactive sources, focused X-ray beam tests and in test beams. The talk summarises results on charge collection efficiency and charge collection time measured in the lab and beam tests, local efficiency distribution in the pixel as determined in beam tests with comparisons before and after irradiation.

These results showed the significantly improved radiation hardness obtained for sensors manufactured through the modified process. Achieving these results opened the way to the design of two large scale demonstrators for the ATLAS ITk outermost pixel layers, where the expected hit rate is 0.4 to 2 MHz/$mm^2$. The "MALTA" chip contains a 512$\times$512 pixel matrix of 36.4 $\mu$m pitch featuring a 1 $\mu$W frontend with in-pixel discrimination based on ALPIDE [5] with a time response $<$ 20ns. The full asynchronous readout without clock distribution over the matrix reduces digital power. The "TJ-Monopix" chip implements the same front-end as MALTA combining it with the well-established column drain architecture. Design and results of these novel depleted monolithic sensors based on a low capacitance analog design with synchronous and asynchronous readout architectures will be presented.

Speaker: Heinz Pernegger (CERN)

TJ-Hiroshima-2017-Pernegger.pdf

14:40 Depleted Fully Monolithic Active CMOS Pixel Sensors (DMAPS) in High Resistivity 150 nm Technology for LHC

Depleted monolithic CMOS active pixel sensors (DMAPS) have been developed to demonstrate their suitability as pixel detectors in the outer layers of the ATLAS Inner Tracker of High-Luminosity LHC. Since the charge collection by drift is mandatory to achieve the required radiation tolerance and timing resolution, sufficient depletion are needed. Two demonstrators have been fabricated in 150 nm LFoundry CMOS technology on high resistive (>2 k$\Omega$·cm) wafer. Thanks to guard rings and sensor layout optimization, the break down voltage of the demonstrators is above 200 V.
The two demonstrator chips have several similarities (chip size of 10 mm x 10mm, pixel size of 250 $\mu$m × 50 $\mu$m with the same sensor layout, the same in-pixel analog electronics), but were designed with different purposes in mind. The first one has been developed to demonstrate the performances of the sensitive volume and analog in-pixel circuitry. The wafer was thinned to 200 $\mu$m and irradiated with neutrons of to fluence of $10^{15} n_{eq}/cm^2$, resulting in small performance degradation. The detection efficiency of un-irradiated and irradiated chip has been measured using 2.5 GeV electron beam. Total ionizing dose irradiation test of analog readout has been performed up to 50 Mrad. The degradation of the gain of the analog amplifier was evaluated to be smaller than 10 %.

The second demonstrator chip is fully monolithic DMAPS design. In addition to the sensitive volume and analog readout copied from the first design, it has in-pixel digital signal processing circuitry and additional periphery electronics, which allow fast readout. The digital architecture is similar to that of FE-I3, which is a readout chip of ATLAS pixel detector. First results show that this demonstrator chip is fully functional and the monolithic readout does not introduce too much noise into the sensor. The timing performances of before and after irradiation damage are currently under characterization using the full monolithic readout.

Speaker: Toko Hirono (University of Bonn (DE))

hiroshima_hirono6.pdf

15:00 HVCMOS Sensors - Progress towards final tracking sensor designs for Mu3e and ATLAS experiments

Commercial HVCMOS technologies allow design of monolithic particle pixel sensors in the form of systems on a chip. Readout electronics is embedded in charge collection electrodes and particle detection occurs in depleted silicon region. The sensors have excellent efficiency in detection of ionizing radiation. In the past ten years, various smaller and reticle size particle detector prototypes have been designed in several commercial semiconductor processes. HVCMOS sensors will be used in Mu3e experiment and are one of the options for ATLAS upgrade and CLIC. The prototypes have successfully met the radiation tolerance, detection efficiency and time resolution requirements for these high particle rate experiments. The next step in our development is the design of large area sensors with all the required features. MUpix and ATLASpix, which are pre-production sensor designs for Mu3e and ATLAS experiments will be presented. The sensors have been produced within an engineering run in AMS 180nm high voltage process. Various novel features have been developed for these final designs. They include the new isolated PMOS structure, the novel high data-rate readout architecture with trigger and data sorting possibility, circuits for amplitude measurements and a special powering scheme. The readout architecture have been optimised using a dedicated simulation environment. Design details, simulation- and measurement results will be presented.

Speaker: Prof. Ivan Peric (KIT - Karlsruhe Institute of Technology (DE))

IvanPericHiroshima.pdf

IvanPericHiroshima.pptx

15:20 Radiation effects on charge collection in HV-CMOS detectors

The HV-CMOS concept for the next generation silicon detectors for high energy physics at hadron colliders aims to integrate the sensor and the readout electronics on the same chip using commercially available CMOS processes. This will significantly simplify the detector production. In addition the technology has a potential for significant improvement of the spatial resolution and for reducing the amount of material in the tracking volume, thereby improving the tracking performance.
For sufficiently high readout speed and radiation hardness charge collection by drift is necessary and a combination of high voltage and high wafer resistivity is required to achieve a sizeable depleted depth.
Extensive studies of charge collection properties of detectors after irradiation with high fluences of fast hadrons must be carried out before they can be used in a HEP experiment. In this work we will present irradiation studies on a set of test structures on the CHESS-2 chip developed by the Strip CMOS Collaboration. The chip was manufactured by AMS in a 350 nm CMOS technology. The samples were produced on p-type silicon wafers with different initial resistivities of 20, 50, 200 and 1000 Ohm-cm in a process allowing a maximal high voltage of 120 V.
Samples were irradiated with neutrons and protons up to 2e15 neq/cm2. The Edge-TCT method with an infrared laser was used to estimate the depleted depth from which effective dopant concentration was extracted and studied as a function of irradiation fluence and initial dopant concentration. Recent measurements with n- in- p detectors have shown that the depleted depth can increase after irradiation due to an effective removal of initial acceptors and evaluation of acceptor removal parameters will be presented in this contribution. A comparison between proton and neutron irradiated samples revealed a larger depletion depth and collected charge after proton irradiation in certain range of fluences and initial resistivities.
The collected charge caused by a passage of MIP-like electrons from a Sr90 beta source was measured with an external amplifier and compared to the charge expected from known depleted depth measured by Edge-TCT.

Speaker: Bojan Hiti (Jozef Stefan Institute (SI))

20171212_hiti_final.pdf

20171212_hiti_final.pptx

15:40 → 16:10 Coffe/Tea break with Poster session: Presenters of "odd" P# to attend the poster

16:10 → 18:10 Session8

Convener: Laci Andricek (MPG Semiconductor Lab)

16:10 The CMS Outer Tracker for HL-LHC

The LHC is planning an upgrade program which will bring the luminosity to about $5-7\times 10^{34} cm^{-2} s^{-1}$ in 2028, with a goal of an integrated luminosity of $3000 fb^{-1}$ by the end of 2037. This High Luminosity LHC scenario, HL-LHC, will require a preparation program of the LHC detectors known as Phase-2 upgrade. The current CMS Tracker is already running beyond design specifications and will not be able to survive HL-LHC radiation conditions. CMS will need a completely new Tracker in order to fully exploit the highly demanding operating conditions and the delivered luminosity. The new Outer Tracker system is designed to provide robust tracking as well as Level-1 trigger capabilities using closely spaced modules composed of silicon macro-pixel and/or strip sensors. Research & Development activities are ongoing to explore options and develop module components and designs for the HL-LHC environment. The design choices for the CMS Outer Tracker Upgrade are discussed along with some highlights of the R&D activities.

Speaker: Alexander Dierlamm (KIT - Karlsruhe Institute of Technology (DE))

CMS-OT_aldi.pdf

CMS-OT_aldi.pptx

16:30 The CBC3 readout ASIC for CMS 2S-modules

The CBC3 is the latest version of the CMS Binary Chip ASIC for readout of the outer radial region of the upgraded CMS Tracker at HL-LHC. It will instrument double-layer 2S-modules, consisting of two overlaid silicon microstrip sensors with aligned microstrips. On-chip logic identifies L1 trigger primitives from high transverse-momentum tracks by selecting correlated hits in the two sensors, so-called “stubs”.

The CBC3 is a 254 channel binary readout ASIC, designed in 130nm CMOS, with each channel comprising preamplifier, shaper and comparator. The comparator outputs are stored in a 512-deep digital pipeline to accommodate trigger latencies of up to 12.8 µs. The CBC3 pipeline was redesigned to reduce radiation induced leakage effects observed in the previous version (CBC2). The CBC3 will instrument double-layer 2S-modules and includes coincidence logic for identifying potential stubs, along with programmable cluster-width discrimination and programmable geometric-offset correction. The channels are divided equally between top and bottom sensors, allowing the logic to identify coincidences between hit strips on both. The CBC3 design improves on the original stub recognition logic by increasing the resolution to half-strip and providing bend information associated with the stub direction. Additional logic is included to assign an 8-bit address to each identified stub and assemble a data packet containing up to three stub addresses per bunch-crossing, along with their corresponding 4-bit bend information and status flags. This data packet is divided into five bytes and output from the ASIC via five differential SLVS output drivers operating at 320 Mb/s, thus allowing the complete data packet to be sent in one bunch crossing.

The CBC3 retains an I2C compatible slow control interface for programming configuration registers, but adopted a 320 Mb/s serial command interface for fast commands such as the L1 trigger. These commands are now received in the form of a serial 8-bit word via a differential SLVS input. Whereas the CBC2 was able to operate off a single 40 MHz clock, the CBC3 required an additional 320 MHz clock domain for the fast I/O. To simplify module design, the CBC3 derives its 40 MHz clock from a synchronisation pattern contained within the fast command-word data stream. This derived clock can be phase shifted by a programmable Delay-Locked-Loop in order to optimise timing relative to the bunch-crossing.

The CBC3 was delivered in late 2016, and wire-bonded chips have been under test for several months, during which time total ionising dose performance and SEU sensitivity was studied using x-rays and proton beams. Results and performance will be reported. Probe testing of wafers was carried out before they were sent to be processed with bumps, in readiness for mounting on a dual-chip hybrid. Results will be presented from electrical characterization, including x-ray irradiations and SEU results, and the current status of 2S-modules instrumented with CBC3s will be described.

Speaker: Dr Kirika Uchida (Imperial College London)

The CBC3 readout ASIC.pdf

16:50 First bulk and surface results for the ATLAS ITk Strip stereo annulus sensors

A novel microstrip sensor geometry, the “stereo annulus”, has been developed for use in the end-cap of the ATLAS experiment’s strip tracker upgrade at the High-Luminosity Large Hadron Collider (HL-LHC). The radiation-hard, single-sided, ac-coupled, n+-in-p microstrip sensors are designed by the ITk Strip Sensor Collaboration and produced by Hamamatsu Photonics.

The stereo annulus design has the potential to revolutionize the layout of end-cap microstrip trackers promising better tracking performance and more complete coverage than the contemporary configurations. These advantages are achieved by the union of equal length, radially oriented strips with a small stereo angle implemented directly into the sensor surface.

The first-ever results for the stereo annulus geometry have been collected across several sites world-wide and are presented here. A number of full-size, unirradiated sensors were evaluated for their mechanical, bulk, and surface properties. The new device, the ATLAS12EC, is compared against its conventionally shaped predecessors, the ATLAS07 and ATLAS12, for realistic evaluation of the sensor design.

The bulk character of the unirradiated sensors has been determined from IV curve, CV curve, and metrology studies. The leakage current and full depletion voltage characteristics have been obtained and compared with the strict specifications required by the next-generation tracker.

Interstrip capacitance and resistance in the four segments of strips, each with equal length constituents and a constant angular pitch, have also been ascertained and are compared to expectations. Long-term leakage current stability tests under various humidity conditions have been conducted to investigate more closely the surface and edge processing. These also allow the determination of any high electric field gradients in the synthesis of stereo radial strips with a tracking coverage enhancing slim edge-width.

The impact of the novel stereo annulus sensor geometry on the operation of the detector has been evaluated in these studies. The suitability of the optimized sensor shape for the ATLAS HL-LHC upgrade and future end-cap microstrip trackers will be discussed.

Speaker: Robert Hunter (Carleton University (CA))

HSTD2017_First-Stereo-Annulus-Results_RFHHunter_smallsize.pdf

17:10 Measurement of charge collection in irradiated miniature sensors for the upgrade of ATLAS Phase-II Strip tracker

Miniature sensors with outer dimension of 10 mm x 10 mm have been produced together with full size sensors for the innermost ring (R0) of the end-cap part in the upgraded ATLAS inner tracker (ITk). AC and DC coupled n-type strips with three different pitches (wide, default and narrow) were processed on high resistivity p-type FZ silicon substrates by Hamamatsu Photonics. Miniature sensors were irradiated with 70 MeV protons at CYRIC at Tohoku University (Japan) and reactor neutrons at Jožef Stefan Institute (Slovenia) to three different 1 MeV neutron equivalent fluences: 0.5, 1 and 2 x 1015 neqcm-2. The upper fluence range exceeds the highest anticipated in the inner-most part of the ATLAS ITk-Strips over the HL-LHC lifetime (~1.5 x 1015 neqcm2). Charge collection in test sensors has been evaluated systematically using 90Sr β-source and Alibava analogue readout system at reverse bias voltages up to 1000 V.

The presentation is on behalf of the ATLAS ITK Strip Sensor Collaboration.

Speaker: Vladimir Cindro (Jozef Stefan Institute (SI))

presentation_hiroshima_cindro_2017.pdf

presentation_hiroshima_cindro_2017.pptx

17:30 Annealing studies of irradiated p-type sensors designed for the upgrade of ATLAS Phase-II Strip Tracker

The upgrade for the High Luminosity LHC in 2025 will challenge the silicon strip detector performance with high fluence and long operation time. Sensors have been designed and tests on charge collection and electrical performance have been carried out in order to evaluate their behavior. Besides that, it is important to understand and predict the long-term evolution of the sensor properties.
In this work, we present detailed studies on the annealing behavior of ATLAS12 strip sensors designed by the ITK Strip Sensor Working Group and irradiated from 510^13 to 210^15 n_eq/cm^2. Systematic charge collection, leakage current and impedance measurements have been carried out during the annealing time at 23 and 60°C until break-down or the appearance of charge multiplication. Sensors showing charge multiplication have been then kept at high voltage for a long time in order to monitor their stability.
The difference in the annealing behavior between the two temperatures has been analyzed. From the impedance measurements for the samples irradiated to low fluences it was possible to extract the effective doping concentration. This was compared to similar measurements on n-type sensors and with a theoretical model.
The results show that ATLAS12 sensors anneal similarly to the previously designed ATLAS07 and the behavior is well described by the theoretical model. Nevertheless, a significant difference on the time constant of the beneficial and reverse annealing has been reported, especially at lower temperatures. For the highest fluences and longer annealing time, e.g. 5000 minutes at 60°C, charge multiplication has been observed. The phenomenon is however temporary and disappears with the long-term voltage stress.

Speaker: Liv Wiik-Fuchs (Albert Ludwigs Universitaet Freiburg (DE))

HiroshimaConference_LivWiikFuchs.pdf

17:50 Testbeam evaluation of heavily irradiated silicon strip modules for ATLAS Phase - II Strip Tracker Upgrade

The planned HL-LHC (High Luminosity LHC) is being designed to maximise the physics potential of the LHC with 10 years of operation at instantaneous luminosities of $7.5x10^{34}cm^{-2}s^{-1}$. A consequence of this increased luminosity is the expected radiation damage requiring the tracking detectors to withstand hadron equivalences to over $1x10^{15}$ 1 MeV neutron equivalent per $cm^{2}$ in the ATLAS Strips system.

The silicon strip tracker exploits the concept of modularity. Fast readout electronics, deploying 130nm CMOS front-end electronics are glued on top of a silicon sensor to make a module. The radiation hard n-in-p micro-strip sensors used have been developed by the ATLAS ITk Strip Sensor collaboration and produced by Hamamatsu Photonics.

A series of tests were performed at the DESY-II and CERN SPS test beam facilities to investigate the detailed performance of a strip module with both 2.5cm and 5cm length strips before and after irradiation with $8x10^{14} neq cm^{-2}$ protons and a total ionising dose of 37.2MRad. The DURANTA telescope was used to obtain a pointing resolution of <4um, with an additional pixel layer installed to improve timing resolution to ~25ns.

Results will show that prior to irradiation a wide range of thresholds (0.5-2.0 fC) meet the requirements of a noise occupancy less than $1x10^{-3}$ and a hit efficiency greater than 99%. After irradiation, there is still a range of thresholds near 0.5 fC that will simultaneously meet both efficiency and noise requirements with short and long strips at 500 V sensor bias.

A signal-to-noise of 10.9:1 was achieved, and is envisaged to increase to ~17:1 with the reduction in noise in the production readout chip with the use of enclosed layout transistors in the critical regions of the front-end.

ATLAS ITk strip sensor working group

Speaker: Dr Andrew Blue (University of Glasgow (GB))

Testbeam_evaluation_of_heavily_irradiated_silicon_strip_modules_for_ATLAS_Phase_-_II_Strip_Tracker_Upgrade_4.pdf

Testbeam_evaluation_of_heavily_irradiated_silicon_strip_modules_for_ATLAS_Phase_-_II_Strip_Tracker_Upgrade_4.pptx

18:30 → 19:30 Busses: OIST to Rizzan

Wednesday 13 December

08:10 → 08:40 Busses: Rizzan to OIST

09:00 → 10:40 Session9

Convener: Angelo Rivetti (Universita e INFN Torino (IT))

09:00 CMOS technologies and power distribution components for HL-LHC: radiation strikes back

The first decade of the century was characterized by a very successful development of radiation-tolerant ASICs in a commercial quarter micron CMOS process, and very promising measurements on commercial-grade 130nm technologies. A straightforward path for the design and integration of ASICs tolerant to ultra-high radiation levels seemed to be wide open. This was without counting on the appearance of new effects at very high radiation levels, and on the resilience of known effects that promptly strike back whenever strict hardness assurance practices are relaxed.
This talk presents recent experiences in 130nm technologies where radiation-induced leakage current or latch-up were found in supposedly production-ready (or already deployed) ASICs, and summarizes the most recent understanding of effects in the 130 and 65nm technologies qualified for HL-LHC applications. An appendix is devoted to the development of radiation- and magnetic field-tolerant power distribution converters. The complexity of radiation-induced mechanisms emerges from this overview and suggests, as in science-fiction movies, never to under-estimate the power of the dark side (of radiation).

Speaker: Federico Faccio (CERN)

HiroshimaTalk.pdf

09:30 INFN-FBK developments in 3D sensors for High Luminosity LHC

3D sensors are a promising option for the innermost pixel layers at the High
Luminosity LHC. However, the required very high hit-rate capabilities,
increased pixel granularity, extreme radiation hardness, and reduced
material budget call for a device downscale as compared to existing 3D
sensors, involving smaller pitch (e.g., 50×50 or 25×100 µm2 ), shorter
inter-electrode spacing (~30 µm), narrower electrodes (~5 µm), and reduced
active thickness (~100-150 µm). Within a joint R&D effort with INFN, FBK has produced a new generation of 3D pixel sensors with these challenging features. In this talk preliminary
results from the electrical and functional characterization of the first
prototypes are reported, included their behaviour after large radiation
fluences, close to the ones expected in the High Luminosity LHC environment.
Prospects for the next prototypes will also be presented.

Speaker: Hideyuki Oide (INFN-Genova)

FBK3D_Oide_20171213.pdf

09:50 Superior radiation hardness of 3D pixel sensors up to HL-LHC fluences and beyond

3D silicon detectors, with cylindrical electrodes that penetrate the sensor bulk perpendicularly to the surface, present a radiation-hard sensor technology. Due to a reduced electrode distance, trapping at radiation-induced defects is less and the operational voltage and power dissipation after heavy irradiation are significantly lower than for planar devices. During the last years, the 3D technology has matured and 3D pixel detectors are already used in high-energy physics particle detectors where superior radiation hardness is key: in the ATLAS Insertable B-Layer (IBL) and the ATLAS Forward Proton (AFP) detector.

For the High-Luminosity upgrade of the Large Hadron Collider (HL-LHC), the radiation-hardness requirements are even more demanding with expected fluences up to 2.5$\times10^{16} n_{eq}$/cm$^2$ for the innermost pixel layer of the ATLAS and CMS experiments after an integrated luminosity of 4,000 fb$^{-1}$ (a replacement after half of it is being considered). Moreover, to face the foreseen large particle multiplicities, smaller pixel sizes of 50$\times$50 or 25$\times$100 $\mu$m$^{2}$ are planned.

In the context of this work, a new generation of CNM 3D pixel sensors with small pixel sizes of 50x50 and 25x100 $\mu$m$^{2}$ and reduced electrode distances are developed for the HL-LHC upgrade of the ATLAS pixel detector. For the first time, pixel detectors are irradiated and studied up to the unprecedented fluence of 3$\times10^{16} n_{eq}$/cm$^2$, i.e. beyond the full expected HL-LHC life time to explore the limits of the 3D technology. Since a readout chip with the desired pixel size is still under development by the RD53 collaboration, first 230 $\mu$m thick prototype small-pitch pixel sensors were designed to be matched to the existing ATLAS IBL FE-I4 readout chip for testing. Irradiation campaigns with such pixel devices have been carried out at KIT (Karlsruhe), as well as at CERN-PS up to a peak fluence of 3$\times10^{16} n_{eq}$/cm$^2$. The hit efficiency has been measured in several beam tests at the CERN-SPS. The performance of these devices is significantly better than for the previous generation of 3D detectors or the current generation of planar silicon pixel detectors, demonstrating the excellent radiation hardness of the new 3D technology.

Speaker: Joern Lange (IFAE Barcelona)

Lange_Hiroshima_Dec2017_3Ddetectors.pdf

10:10 Status and road map of hybridization technologies relevant to future pixel detectors

A 3D-IC is an effective solution for reducing the manufacturing costs of advanced 2D LSI while ensuring equivalent device performance and functionalities. This technology allows for a new device architecture of stacked detectors/sensor devices with a small dead sensor area and facilitates hyper-parallel data processing. In pixel sensors and detectors, many transistors must be accommodated per pixel area to improve the space and time resolutions without increasing the pixel size. Currently, many methods to realize 3D-LSI devices have been developed by focusing on the unit processes of 3D-LSI technology: (1) through-silicon via (TSV) formation, (2) bump formation, (3) wafer thinning, (4) chip/wafer alignment, and (5) chip/wafer bonding. However, these unit processes are incompatible in terms of various device and process requirements such as process temperature, device structure, TSV and bump dimensions, yield, reliability, and supply chain. In this paper, recent 3D-IC technology and market trend are introduced. And Current development status, design rule, 3D structure, yield issues and the cost reduction method for stacked pixel detectors will be presented.

Speaker: Makoto Motoyoshi (Tohoku-MincroTec Co., Ltd (T-Micro))

171213Presentation.pdf

10:40 → 11:10 Coffe/Tea break with Poster session: Presenters of "even" P# to attend the poster

11:10 → 12:30 Session10

Convener: Suen Hou (Academia Sinica (TW))

11:10 Diamond detector technology; status and perspectives

Detectors based on Chemical Vapor Deposition (CVD) diamond have been
used extensively and successfully in beam conditions/beam loss monitors
as the innermost detectors in the highest radiation areas of essentially
all LHC experiments. The startup of the LHC in 2015 brought a new
milestone where the first diamond pixel modules were installed in an LHC
experiment (ATLAS) and successfully began taking data. As a result,
this material is now being discussed as a possible sensor material
for tracking very close to the interaction region and for pixelated
beam conditions/beam loss monitors of the LHC/HL-LHC upgrades where
the most extreme radiation conditions will exist.

The RD42 collaboration at CERN is leading the effort to use CVD diamond
as a material for tracking detectors operating in extreme radiation
environments. During the last three years the RD42 group has succeeded
in producing and measuring a number of devices to address specific issues
related to use at the HL-LHC. We will present status of the RD42 project with
emphasis on recent beam test results. In particular we present the latest
results on material development, the most recent results on the independence
of signal size on incident particle rate in poly-crystalline CVD
diamond pad and pixel detectors over a range of particle fluxes up to
20 MHz/cm^2 measured, and describe the most recent devices fabricated. In
addition we will present the plans for future use of the most recent devices

Speaker: Harris Kagan (O)

Kagan-RD42-HSTD11-2017.pdf

11:30 Results on Radiation Tolerance of Diamond Detectors

At present most experiments at the CERN Large Hadron Collider (LHC)
are planning upgrades in the next 5-10 years for their innermost
tracking layers as well as luminosity monitors to be able to take data
as the luminosity increases and CERN moves toward the High Luminosity-LHC
(HL-LHC). These upgrades will most likely require more radiation
tolerant technologies than exist today. As a result this is one area of
intense research. Chemical Vapor Deposition (CVD) diamond is one such
technology. CVD diamond has been used extensively in beam condition
monitors as the innermost detectors in the highest radiation areas of
BaBar, Belle, CDF and all LHC experiments. This talk will describe the
recent radiation tolerance measurments of the highest quality
polycrystalline CVD material for a range of proton energies, pions and
neutrons obtained with this material with the goal of elucidating the
issues that should be addressed for future diamond based detectors. The
talk will also discuss the new results on the evolution of various
semiconductor parameters as a function of dose.

Speaker: Nicola Venturi (CERN)

RadiationToleranceDiamond.pdf

11:50 A novel Transient-Current-Technique based on 2-Photon Absorption in Diamond

A novel femtosecond laser based Transient Current Technique (TCT) to probe the charge transport properties of single crystalline Chemical Vapor Deposition (sCVD) diamond sensors will be presented. In this method, the laser beam with the wavelength of 400 nm and pulse duration 30 fs enters the diamond through a polished edge (hence Edge-TCT or E-TCT) and is focused inside the bulk at a known position. The dimensions of the focus point limit the size of the voxel in which charge carriers are produced by multi-photon absorption. We record the time-dependent current response of the drifting electrons and holes. This allows probing the electric field and charge carrier movement inside the bulk in a way that was not possible before.

Speaker: Christian Dorfer (Eidgenoessische Technische Hochschule Zuerich (CH))

edge-TCT.pdf

edge-TCT.pptx

12:10 Radiation-Hard ASIC for High-Speed VCSEL Array Data Transmission at HL-LHC

The LHC has recently been upgraded to operate at higher energy and luminosity. In addition, there are plans for further upgrades. These upgrades require the optical links of the experiments to transmit data at much higher speed in a more intense radiation environment. We have designed a new optical transceiver for transmitting data at 10 Gb/s. The device consists of a 4-channel ASIC driving a VCSEL (Vertical Cavity Surface Emitting Laser) array in an optical package. The ASIC is designed using only core transistors in a 65 nm CMOS process to enhance the radiation-hardness. The ASIC contains an 8-bit DAC to control the bias and modulation currents of the individual channels in the VCSEL array. The settings are stored in SEU (single event upset) tolerant registers. Several optical transceivers were irradiated with 24 GeV/c protons up to a dosage of 74 Mrad to study the radiation hardness of the high-speed optical links. The irradiated devices have been extensively characterized. The performance of the devices is satisfactory after the irradiation. We will present a comparison of the performance of the devices before and after the irradiation. We have also designed an equalizer circuit to correct for the degradation of the signal received after transmission via a long/small cable. The result from simulation of the design will be presented.

K.K. GAN*^1, P. Buchholz^2, S. Heidbrink^2, H.P. Kagan^1, R.D. Kass^1, J.R. Moore^1, D.S. Smith^1, M. Vogt^2, M. Ziolkowski^2

1) Department of Physics, The Ohio State University, Columbus, OH 43210, USA
2) Fachbereich Physik, Universität Siegen, Siegen, Germany
*Corresponding Author’s email: gan@mps.ohio-state.edu

Speaker: K.K. Gan (The Ohio State University (US))

HSTD11_Gan.pdf

12:30 → 18:00 Excursion: Lunch in the coach(bus)

Conveners: Noriko Odaka (KEK), Ritsuko Ota (KEK), Yasuo Arai (High Energy Accelerator Research Organization (JP)), Yoshinobu Unno (High Energy Accelerator Research Organization (JP))

HSTD11-SOIPIX2017_Excursion_20171113.pdf

18:30 → 21:00 Banquet

Convener: Yoshinobu Unno (High Energy Accelerator Research Organization (JP))

BanquetHallDirection.pdf

21:00 → 21:15 Busses: Hotel bus to OIST

Thursday 14 December

08:10 → 08:40 Busses: Rizzan to OIST

09:00 → 10:20 Session11

Convener: Artur Apresyan (Fermi National Accelerator Lab. (US))

09:00 Timing Resolution Measurements on Utra-fast Silicon Detectors

Timing Resolution Measurements
of Ultra-Fast Silicon Detectors vs. Temperature, Fluence, Thickness
Hartmut F.W. Sadrozinski
representing the
UFSD Collaboration (UC Santa Cruz, INFN Torino, IJS Ljubljana, CNM Barcelona, LPNHE Paris)

We report on the performance of UFSD (Ultra-Fast Silicon Detectors) from two vendors CNM (LGAD thickness 45μm) and HPK (LGAD thickness 50 and 80μm). UFSD are segmented thin silicon sensors with internal gain.
We will report measurements pre-rad and post-rad with neutron fluences between 1e14 and 6e15 n/cm^2 of: the leakage current, gain, time jitter, time resolution and the value of Landau fluctuations. The pre-rad measurements were performed at three temperatures (+20 deg C, 0 deg C, -20 deg C) and the post-rad measurements at -20 deg C and -30 deg C.
A few of the findings:
• LGAD with higher initial doping concentration in the gain layer achieve post-rad higher gain and better time resolution.
• An advantage of using thinner LGAD is the reduced contribution of the Landau Fluctuation to the time resolution.
• A decrease of gain due to irradiation is partially compensated by a decrease in the rise time.
Potential applications of UFSD will be discussed.

Speaker: Hartmut Sadrozinski (SCIPP, UC Santa Cruz)

HSTD1--HFWS1.pdf

09:20 First production of 50 µm thick Ultra-Fast Silicon Detectors at FBK

In this contribution, we present new developments in the production of Ultra-Fast Silicon Detectors at the Fondazione Bruno Kessler (FBK, Trento, Italy).
Ultra-Fast Silicon Detectors (UFSD) are innovative silicon sensors optimised for timing measurements based on the Low-Gain Avalanche Diode design. UFSD recently obtained a time resolution of $\sigma_t$ ~ 30 ps in beam tests and are now being considered in the upgrade of the CMS and ATLAS experiments as timing detectors.
After the successful production of the first batch of 300 $\mu$m thick UFSD in 2016, FBK has recently delivered its first 50 $\mu$m thick UFSD sensors. These sensors use high resistivity Si-on-Si substrates, and have a variety of doping profiles and strategies based on Boron, Gallium, Carbonated Boron and Carbonated Gallium to obtain a controlled multiplication mechanism. Such variety of gain layers will allow identifying the most radiation hard technology to be employed in the production of UFSD, to extend their radiation resistance beyond the current limit of $\Phi$ ~ 10$^{15}$ n$_{eq}$/cm$^2$.
In our contribution, we will show the timing performances of this new FBK production and we will present results on radiation damage tolerance for the 4 different types of gain layer design.

Speaker: Valentina Sola (Universita e INFN Torino (IT))

vs_UFSD-FBK_HSTD11.pdf

09:40 Evaluation of Characteristics of Hamamatsu Low-Gain Avalanche Detectors

Low-gain avalanche detectors (LGADs) are attracted for fast response for realizing a 4D tracker in future experiment and for possible other applications. We have fabricated LGAD diodes and strip sensors and evaluated their characteristics including such as response to LEDs with various wavelengths/infrared laser, radiation hardness to proton and neutron irradiations. We noticed that a substantial gain is obtained in the interstrip region after irradiation whereas the gain was unity before irradiation. The gain was found reduced in the doped region. The radiation-induced gain variation is discussed from TCAD simulations.

Speaker: Sayaka Wada (University of Tsukuba)

HSTD11wada.pdf

10:00 New 50µm thin LGAD for Tracking and Timing Applications

Low Gain Avalanche Detectors (LGAD), are customised Avalanche Photodiodes (APD) to obtain a high electric field region confined close to the reversed junction. As a consequence, only the electrons generated when an incident particle passes through the detector start the impact ionization. Thus multiply the charge collected by readout electronics without increasing the noise in the signal. Due to this increase of the signal-to-noise ratio the timing resolution of these detectors is reduced to less than 50ps [1]-[3]. LGAD detectors are based on the conventional power PiN diode fabricated in a very high resistivity P-type substrate (5-10 k), mandatory to work in a high radiation environment. Then, a deep P-type diffusion is formed at same place where the shallow N+ diffusion is implanted. Finally, the back side P+ diffusion is implanted to guarantee a good electrical contact with the Aluminium electrode. In this way, the n+-p-p- junction is reversed biased during normal operation of the detector with the extremely low doped substrate fully depleted. Incident particles create a certain density of electron-hole pairs in the depleted region and, as a consequence of the electric field, are accelerated towards the corresponding electrode. Electrons flowing towards the positive biased N+ diffusion generate new electron-hole pairs at the multiplication region with high electric field, thus enhancing the collected charge. The key point of the LGAD core cell design is the precise control of the implantation dose and energy of the multiplication P-type diffusion and also the fine tuning of the total thermal budget to get the desired profile. However, the design of the edge termination and the peripheral region of the detector are also crucial to get the desired breakdown voltage (typically in excess of 1000 V for 300µm thick detector) and to minimize the leakage current coming from the periphery that may mask the readout electronics. Deep p-type diffusions are commonly implemented to avoid surface current as a consequence of the creation of an inversion N-type layer due to the extremely low doping of the substrate.
LGAD devices have been successfully fabricated on 300 micron thick substrates and extensively characterized, before and after irradiation. However, the radiation hardness of these devices is not as good as it should be for timing applications due to the degradation of the gain and creation of traps in the bulk [4]. A way to reduce the bulk radiation effects (creation of traps in the bulk) of LGAD detectors is to reduce the substrate thickness as much as possible. Two approaches have been contemplated: the use of SOI substrates with an active silicon layer of 50 microns and the use of Silicon to Silicon bonding substrates with an active silicon layer of 50 microns. As a consequence, the distance covered by the generated electrons and holes is significantly reduced and the number of electrons trapped due to radiation bulk defects is also reduced.
Therefore, the new family of thin detectors, named High Granularity Timing Detectors (HGTD) is suitable for timing applications with time resolution less than 30 ps at -20C.
The measurement comparisons of HGTD on different substrates will be presented and discussed.
The decrease of the detector active thickness reduces the trapping but doesn’t avoid the degradation of gain due to acceptor removal. As it was observed by Khan Gallium doped wafers showed a drastic reduction of the acceptor removal [5]. Therefore Gallium LGADs has been produced to reduce the gain degradation on LGADs. The first batch has been produced on 300 µm thick high resistivity p-type substrates and 50 µm thin detectors with Gallium multiplication layer are ongoing. The performance and radiation damage of Gallium LGADs will be discussed in the present work.

REFERENCES
[1] H.F.-W. Sadrozinski et al. “Ultra-Fast Silicon Detectors,” Nuclear Instruments and Methods in Physics Research A, 831 (2016) 18-23.
[2] J. Lange et al “Gain and time resolution of 45µm thin Low Gain Avalanche Detectors before and after irradiation up to a fluence of 1015 neq/cm2,” ," Journal of Instrumentation, 12, P05003, 2017
[3] N. Cartaglia et al “Beam test results of a 16ps timing system based on ultra-fast silicon detectors,” Nuclear Instruments and Methods in Physics Research A, 850 (2017) 83-88.
[4] G. Kramberger et al. "Radiation Effects in Low Gain Avalanche Detectors after Hadron Irradiations," Journal of Instrumentation, 10, PO7006, 2015.
[5] A. Khan et al., “Role of the impurities in production rates of radiation-induced defects in silicon materials and solar cells”, Journal of Applied Physics, 90 , 1170, (2001)

Speaker: Maria del Mar Carulla Areste (Instituto de Microelectronica de Barcelona IMB-CNM)

Hiroshima_Symposium_14-12-2017.pdf

Hiroshima_Symposium_14-12-2017.pptx

10:20 → 10:50 Coffe/Tea break with Poster session: Presenters of "odd" P# to attend the poster

10:50 → 12:30 Session12

Convener: Carlos Lacasta Llacer (IFIC-Valencia)

10:50 A High-Granularity Timing Detector for the Phase-II upgrade of the ATLAS Calorimeter system: detector concept description and first beam test results

The expected increase of the particle flux at the high luminosity phase of the LHC (HL-LHC) with instantaneous luminosities up to L ≃ 7.5 × 10^{34} cm^{−2} s^{-1} will have a severe impact on the ATLAS detector performance. The pile-up is expected to increase on average to 200 interactions per bunch crossing. The reconstruction and trigger performance for electrons, photons as well as jets and transverse missing energy will be severely degraded in the end-cap and forward region, where the liquid Argon based electromagnetic calorimeter has coarser granularity compared to the central region. A High Granularity Timing Detector (HGTD) is proposed in front of the liquid Argon end-cap calorimeters for pile-up mitigation at Level-0 (L0) trigger level and in the offline reconstruction.

This device should cover the pseudo-rapidity range of 2.4 to about 4.2. Four layers of Silicon sensors are foreseen to provide a precision timing information for minimum ionizing particle with a time resolution better than 50 pico-seconds per readout cell in order to assign the particle to the correct vertex. Each readout cell has a transverse size of 1.3 mm × 1.3 mm leading to a highly granular detector with more than 6 millions of readout electronics channels. Low Gain Avalanche Detectors (LGAD) technology has been chosen as it provides an internal gain good enough to reach large signal over noise ratio needed for excellent time resolution.

The requirements and overall specifications of the High Granular Timing Detector at the HL-LHC will be presented as well as the conceptual design of its mechanics and electronics. Beam test results and measurements of irradiated LGAD silicon sensors, such as gain and timing resolution, will be shown.

Speaker: Giulio Pellegrini (Centro Nacional de Microelectrónica (IMB-CNM-CSIC) (ES))

Pellegrini_HGTD.pdf

11:10 In-orbit performance of the silicon tracker of DAMPE

DAMPE (DArk Matter Particle Explorer) is a satellite-borne cosmic-ray and gamma-ray detector, designed to probe high-energy astro particle physics in GeV-100 TeV range. It was launched on December 17, 2015 and started its on-orbit operation on December 24, 2015. The main objectives of DAMPE are the identification of possible indirect signatures of particle Dark Matter annihilation or decay, a better understanding of the origin and of the propagation mechanisms of high energy cosmic rays, and gamma-ray astronomy. DAMPE consists of four sub-systems: a plastic scintillator strip detector (PSD) for the cosmic-ray charge measurement and for the veto signal for photon identification; a silicon-tungsten tracker-converter (STK); an imaging calorimeter made up of 14 layers of Bismuth Germanium Oxide (BGO) bars in a hodoscopic arrangement with a total thickness of 32 radiation lengths, for precise energy measurement and electron/proton separation, and a boron-doped plastic scintillator to detect delayed neutrons originating from hadronic interactions at high energies (NUD), to improve the electron/hadron separation. The STK is a crucial component of DAMPE which allows to determine the direction of incoming photons, to reconstruct tracks of incoming cosmic rays and estimate their charge. The STK consists of 768 silicon sensors assembled in 6 tracking double layers, with a total sensitive area of 6.6 m$^2$, interleaved with a three layers of tungsten for about one radiation length of material in the STK, to promote conversion of incoming photons into electron-positron pairs. Since the launch STK shows an excellent performance on-orbit, and a real-time commissioning and calibration of the tracker is done to fully profit of the STK capabilities, allowing it to play a key role in the first physics results of DAMPE. In this contribution, first we give a brief overview of construction and tests on ground of the STK and then we present the results of the on-orbit performance of the STK, including the noise behavior, the thermal and mechanical stability, the alignment and position resolution and the tracking efficiency.

Speaker: Andrii Tykhonov (Universite de Geneve (CH))

hiroshima_tykhonov.pdf

11:30 Development of 60 $\mu$m pitch CdTe double-sided strip detectors for the FOXSI-3 sounding rocket experiment.

We have developed a CdTe double-sided strip detector (CdTe-DSD) with a fine strip pitch of 60 $\mu$m for the FOXSI-3 sounding rocket experiment. The experiment aims to observe the Sun using direct-focusing optics in the hard X-ray range to achieve superior sensitivity and imaging dynamic range over that of previous, indirect imagers. The CdTe-DSD is the focal plane detector for the hard X-ray telescope. In the CdTe-DSD, there are 128 strips at a pitch of 60 $\mu$m, both on the anode and cathode sides of the CdTe diode device. In order to reduce the leakage current, guard rings surround the readout electrodes on both sides. The thickness of 750 $\mu$m of the detector provides almost 100 % detection efficiency up to 50 keV, well above FOXSI's range. Signals are read out by low noise photon-counting ASICs developed for the soft gamma-ray detector onboard ASTRO-H. The ASIC has 64 channels, each consisting of a CSA and two CR-RC shaping amplifiers, one for self-triggering and the other for pulse-height measurement. Fully digital readout by a Wilkinson-type 10-bit ADC, implemented for each channel of the ASIC as well, enables us to make the readout board very compact.
In preparation for the launch of FOXSI-3, a prototype detector with an improved design of the front-end-circuit board, from that used for the FOXIS-2 experiment, was fabricated and thoroughly tested to start the production of the flight models. Study of spectral and imaging responses of the CdTe-DSD has been carried out by using various radioactive X-ray sources. Thus far, an energy resolution of 780 eV(FWHM) for the 14 keV line of 241-Am has been achieved and the detector shows uniform response on the entire detector plane. Six flight model detectors are now under production and their calibration and integration into the system will be conducted by the end of this year to meet the launch schedule of summer 2018. In this presentation, results of performance tests of the prototype and the flight detectors will be presented.

Speaker: Mr Kento Furukawa (ISAS/JAXA)

hiroshima_conf_cdte_sent.pdf

11:50 Optical and electrical characterization of Cadmium Telluride (CdTe) X-ray pad detectors

For a long time, Cadmium Telluride (CdTe) and Cadmium Zinc Telluride (CdZnTe/ CZT) have been considered to be suitable materials for various high energy photon detection applications. Unlike elementary semiconductors such as silicon (Si) or Germanium (Ge), the control over the material quality (of CdTe and CZT), is substantially more complicated and is determined during the crystal growth, chip dicing, detector processing and the interconnections to the associated readout electronics. Consequentially, these process steps have influence onto the operation performance of the detector. The manifestation of shortcomings in the quality, are extended defects such as distributions of metallic inclusions/ precipitates, grain boundaries, multiple grains and multicrystallinity. These defects have widely been identified to be the major challenges in the scope of large scale detector applications of CdTe and CZT.
In this contribution, we report a fabrication process of several pad detectors, made of bulk CdTe crystals. Prior the processing the material quality and defect density of the CdTe was characterized by 3-dimensional (3D) infrared (IR) microscopy and spectroscopy. The advantage of the optical characterization is that it is a fast and non-destructive technique. Furthermore, minimum sample preparation and potentially detrimental handling is required. Each of the 1 cm$^2$ sized CdTe detectors were designed with nine pads at different positions. Additionally, the layout includes strip-like structures at different distances from the edges of the chip. The purpose of these strips is to study the detector sensitivity near the usually heavily damaged edges. The results of IR characterization are compared with leakage current probing and Transient Current Technique (TCT) analysis.

Speaker: Alexander Dieter Winkler (Helsinki Institute of Physics (FI))

Optical and electrical characterization of Cadmium Telluride (CdTe) X-ray pad detectors.pdf

12:10 Development of a far-infrared image sensor with Si-supported Ge BIB detector and FD-SOI cryo-CMOS ROIC hybritized by nano-particle deposition Au-bump

Far-infrared (FIR) wavelength (30-200 $\mu$m) is an important tool to study the formation of planets, stars and galaxies. Gallium doped germanium (Ge:Ga) extrinsic photo-conductors (PCs) and cryo-PMOS readout integrated circuits (ROICs) were used in the previous space infrared astronomical observatories such as AKARI and Spizer.
Development of FIR large format image sensor is, however,difficult because of the following reasons:
1) Stress mechanism is required to extend the cut-off wavelength from that of Ge:Ga PC (120 $\mu$m) to 200 $\mu$m.
2) Large power consumption of the PMOS ROIC limits the number of pixel.
3) Thermal expansion mismatch between Ge detector and Si ROIC damages the In bump interconnection between them.
In order to overcome these problems, we are developing a large format FIR image sensor by the following key technologies:
1) Ge:Ga blocked impurity band (BIB) detector,
2) fully-depleted silicon-on-insulator (FD-SOI) cryo-CMOS ROIC,
3) a thick Si support for a thin Ge detector,
and hybridization by nano-particle deposition (NpD) Au-bump. A demonstration astronomical observation by a balloon experiment is also planned.
Here we report the overview and the latest status of our project. The details of the Si-supported Ge BIB detector, the cryogenic FD-SOI CMOS ROIC, and the balloon observation with the detector will be shown by the other authors in this workshop.

Speaker: Dr Takehiko Wada (ISAS/JAXA)

soipix-2017_gebib_fdsoi_roic_wada_20171214A_pub.pdf

12:30 → 14:00 Lunch break with Poster session: Free presenter attend.

14:00 → 15:40 Session13

Convener: Prof. Qun OUYANG (Insitute of High Energy Physics, CAS, Beijing, China)

14:00 Development and performance of double SOI pixel sensors

Double Silicon-on-Insulator (SOI) pixel sensors have been developed using fully-depleted (FD) SOI pixel process technology in recent years. It consists two thin SOI layers and a thick silicon substrate. The top SOI later uses as CMOS circuit and another SOI (middle SOI) layer is used to reduce sensor and circuit crosstalk and the back-gate effect. The middle SOI layer is also effective for enhancement of radiation hardness. The silicon substrate is p-type and the negative back bias is applied. In 2014, a high-resolution, integrated SOI pixel sensor, called INTPIX8, was developed with single and double SOI wafers. It has gain switch to operate the sensor with 4 gain settings. X-ray spectra were obtained using radiation sources to determine the sensor gain and the coupling capacitance between the sensor and the circuit was evaluated. We also performed X-ray imaging tests with wide X-ray ranges. The resistivity of 300 um-thick substrate in the double SOI wafer is about 1 kOhm-cm and the sensor can not be fully-depleted below 500V. Therefore we performed back side thinning up to 75 um and it might be fully-depleted below 100V. We have tested several integration-type pixel sensors with double SOI wafer and various properties such as pixel leakage current, noise, sensor gain and full depletion voltage were investigated. In the presentation, the test results and application examples will be shown.

Speaker: Toshinobu Miyoshi (KEK)

20171214soi_miyoshi_v3.pdf

14:20 Double Photon Emission Compton imaging based on event-driven SOI and GAGG-SiPM pixel detectors

Compton imaging is a promising gamma-ray imaging method because of its collimator-less detection and the application to medical field is expected. However the imaging capability for distributed sources is still under investigation because of its low signal to noise ratio derived from Compton cones. To solve this problem, we introduce double photon emission imaging based on Compton imaging for cascaded gamma rays from nuclides, such as In-111 as a new imaging method. The coincidence detection of cascaded photons greatly decreases the effect of Compton cones. An event-driven fine-pitch SOI 36 µm pixel detector and 8 by 8 array of HR-GAGG-SiPM are used as scatter and absorber in the designed Compton imager. The basic performance of double photon emission Compton imaging is characterized.

Speaker: Kenji Shimazoe (The University of Tokyo)

shimazoe_20171214SOIPIX2017.pdf

14:40 Development of a position and time sensitive ion detector MALPIX for stigmatic imaging mass spectrometry

Imaging mass spectrometry (IMS) is an analytical technique to simultaneously obtain spatial distributions of multiple atoms and molecules. Molecules such as lipids, proteins, and administered drugs in a biological tissue can comprehensively be observed without labeling. Matrix-assisted laser desorption/ionization (MALDI) is the most major ionization method used for IMS. Higher spatial resolution and shorter measuring time compared with conventional scanning IMS are possible with stigmatic IMS. A spatial resolution of 1 µm for an artificial pattern has been shown with a stigmatic IMS device developed by the authors and coworkers. In the stigmatic IMS, spatial distributions of the analytes on the sample surface are magnified and projected on the detector surface with electrostatic lenses. The detector for the stigmatic IMS is required to simultaneously detect the position and flight time of an ion with spatial and temporal resolutions of 50 µm and 1 ns, respectively. To enable such high speed response, we are developing a position and time sensitive ion detector named MALPIX using the silicon-on-insulator (SOI) CMOS process. Ions are converted to electrons by a microchannel plate (MCP). Each pixel of MALPIX has a metal pad which works as an input electrode, source follower, a discriminator, and a memory. When the electrons from the MCP arrive at the metal pad, the source follower outputs the voltage amplitude. If it is over the threshold, the discriminator outputs a signal to latch the time information and to allow the memory inside the hit pixel to store the time stamp at that time. Time information is generated by a gray code counter and time memory cell (TMC) located outside the pixel array. The time data stored in each pixel can be read out when addressed after the time counter overflows.
Using a 3 x 3 mm3 prototype of MALPIX, the basic function of TMC was confirmed. The voltage controlled oscillator normally used at a frequency of 62.5 MHz oscillates up to 120 MHz, and the phase-locked loop stably operated with a time jitter below 170 ps. In the ion irradiation experiment inside a vacuum chamber, a sample plate, extraction electrode, electrostatic lenses, and MCP were set in front of MALPIX, and the appropriate potentials were given to them so that ion distributions at the sample surface are projected on the MCP. Cesium is put on the sample plate, and a metal mask with a 1 mm dimeter hole is placed in front of MCP. Only ions which pass the mask hole can reach MCP and they are detected by MALPIX. In this experiment with the flight distance of about 50 cm, an ion image corresponding to the hole of the mask was successfully observed at theoretically expected flight time for Cs+ ion.

Speaker: Dr Hisanao Hazama (Graduate School of Engineering, Osaka University)

15:00 Performance ofSOPHIAS detectors in synchrotron-radiation-experiment modes

SOPHIAS detectors have been developed for x-ray free-electron laser (XFEL) experiments [1]. The SOPHIAS sensor has 1.9 Mpixels with a pixel size of 30 um square. Recently, their applications have been extended to synchrotron radiation (SR) experiments, where their small pixel size has enabled various studies such as magnetic domain observation in hard x-ray transmission geometry, soft matter characterization by ultra-small angle scattering and coherent scattering in transmission and reflection geometries. In this paper, we report our investigations of SOPHIAS characteristics and performance improvements for the SR experiments. We have investigated true CDS(Correlate Double Sampling), and pseudo CDS operation modes in order to maximize the duty ratio while keeping the noise low. We have found that continuous illumination makes the true CDS mode erroneous results, and have chosen the pseudo CDS mode. In contrast to the XFEL experiments where the required exposure time is at most several tens of nanoseconds, synchrotron radiation experiments demands longer exposure. In the SOPHIAS operation for SR experiments, the sensors runs at 20 frames per seconds with an exposure time of 34 ms/frame(Duty 70%). The white defects then become prominent and degrade the noise and dynamic range. We report our effort to minimize the white defects as well.

Speaker: Dr Togo Kudo (RIKEN)

SOIPIX2017_kudo.pptx

15:20 A prototype SOI pixel sensor for CEPC vertex

The Circular Electron Positron Collider (CEPC) has been proposed in China as a Higgs and/or Z factory. A pre-CDR study has been conducted which identified critical R&Ds for each sub-system of the detector and the accelerator. Pixel sensors with high spatial resolution and low material budget are required to construct the inner most layers of vertex sub-detector. As a part of R&D activities, a small prototype of SOI pixel sensor featuring 16 um pitch and 75 um thickness has been developed accordingly. The pixel matrix is arranged in 64 columns and 64 rows, with analog readout in one half of the matrix and binary readout in the other half. The pixel pitch was chosen by a TCAD simulation so that even with binary readout the sensor is able to achieve a point resolution better than 3 um. Characterization of sensor has been performed in the lab and encouraging results by Fe55 source test and infrared laser test will be presented. Lessons learned from this prototype will be discussed and feed back to the next design.

Speaker: Mr Zhigang Wu (Institute of high energy physics(IHEP))

A prototype SOI pixel sensor for CEPC vertex.pdf

15:40 → 16:10 Coffe/Tea break with Poster session: Presenters of "even" P# to attend the poster

16:10 → 17:50 Session14

Convener: Manabu Togawa (High Energy Accelerator Research Organization (JP))

16:10 Development of a monolithic pixel sensor based on SOI technology for the ILC vertex detector

We are developing an silicon-on-insulator (SOI) pixel sensor SOFIST for the vertex detector system of the International Linear Collider experiment. The SOFIST has a pixel size of 20$\times$20 $\mu$m$^2$ with fine position resolution better than 3 $\mu$m, which is required as a pixel sensor for ILC vertex detector. The pixel circuit stores both the signal charge and timing information of the incident particles. The sensor can separate hit events with recording timing information during bunch-train collisions of the ILC beam. Each pixel has multiple stages of analog memories and timestamp circuits for accumulating multiple hit events.
We have developed the first prototype sensor SOFIST Ver.1. The Ver.1 chip consists of 50$\times$50 pixels and Column-parallel ADC circuits in a chip size of 3$\times$3 mm$^2$. We designed the pixel circuit for the charge signal readout with a pre-amplifier circuit and 2 analog memories. The Ver.1 chip was evaluated with 120 GeV Proton beam at Fermilab Test Beam Facility in January 2017. We observed the position resolution better than 1.5 $\mu$m.
In this presentation, we report the status of the development and the evaluation of the SOFIST prototype chip.

Speaker: Shun Ono (KEK)

HSTD11_ono_20171212.pdf

16:30 Beam test results of a monolithic pixel detector designed in SOI 200nm technology.

For tracking detectors at future linear colliders a high-precision position measurement is required. In order to limit multiple scattering, a detector with low material budget id advantageous. Monolithic structures represent a promising solution for such detectors. This work presents the test beam results of pixel detectors fabricated in Lapis $200~nm$ Silicon-On-Insulator (SOI) CMOS technology. The SOI prototypes were tested in Summer 2017 - at CERN's SPS H6 beam line with 120 GeV pion beams using a Timepix3 telescope as a reference.
Two wafer types with different resistivity and detector thickness were tested: Floating Zone type n and Double SOI type p. Moreover, the measured matrix consists of two different pixel types, one based on charge preamplifier architecture and one based on source-followers. The data was analysed in terms of spatial resolution and detector efficiency. The analysis chain included pedestal and noise calculation, different cluster reconstruction algorithms, as well as alignment and eta correction. The preliminary results give a resolution of about 2.5 $\mu m$ for 30 $\mu m$ square pixel pitch.

Speaker: Szymon Bugiel (AGH University of Science and Technology (PL))

2017_HSTD11_SzymonBugiel.pdf

16:50 Radiation hardness of silicon-on-insulator pixel device

The SOI technology is very attractive realizing high-performance monolithic pixel devices. The TID tolerance has been a mojor issue in applicatons, as the positive charges accumulated in the oxide layers deteriorate the performance of the nearby FETs. With use of the innovative double-SOI, the TID effect is shown to be compensated by applying negative voltages to the middle layer. We fabricated a pixel sensor for demonstration and succeeded in operating the pixel device irradiated up to 1 MGy.

Speaker: Kazuhiko Hara (University of Tsukuba)

HSTD11-hara2.pdf

HSTD11-hara.pdf

HSTD11-hara.pptx

17:10 Investigation of Radiation Hardness Improvement by Applying Back-gate Bias for FD-SOI MOSFETs

Radiation hardness improvement of FD-SOI MOSFETs has been investigated in terms of positive charge compensation in buried oxide (BOX) by applying back-gate bias. In general, the radiation tolerance of SOI MOSFET is low in total ionizing dose (TID) because the relatively thick oxide, BOX, exists underneath the MOSFETs and the positive charge generated in the oxide by the irradiation. Then, increase of N-channel MOSFET or decrease of P-channel MOSFET drain current occur due to threshold voltage shift caused by field effect of the generated positive charge in BOX. There is possibility to compensate the charge by biasing the back-gate to negative. However, the compensation method is effective when the front-side MOSFET degradation is well controlled and the variation of generated positive charge in BOX is minimized between N and P channel and for wide range of gate length. With using radiation hardened lightly doped drain (RH-LDD) to suppress radiation induced gate length modulation (RIGLEM) and L=0.2 to 10 um MOSFETs, we found the back-gate bias windows to keep the linear drain current variation within 15% up to 100 kGy(Si) X-ray irradiation. This is evidence for high radiation hardness even for FD-SOI MOSFET in TID with the back-gate bias compensation. This back-gate compensation method is also suitable for double SOI technology which has the silicon shield electrode in the middle of BOX.

Speaker: Prof. Ikuo Kurachi (HIgh Energy Accelerator Research Organization)

kurachi_SOIPIX2017_45.pdf

17:30 Total ionizing dose effects on the SOI pixel sensor for X-ray astronomical use

We report on total ionizing dose effects on the X-ray SOI pixel sensor, XRPIX. The XRPIX has been developed as an imaging spectrometer for X-ray astronomical use in space. Front- and back-illuminated (FI and BI) devices were irradiated with hard X-rays from an X-ray tube operated at 30 kV with Molybdenum target. We found that the degradation rate of readout noise performance of the FI device is about three times faster than that of the BI device as a function of radiation dose to the devices. The degradation rates of both devices, however, are almost the same as a function of absorption dose of the buried oxide layer, Dbox. This fact demonstrates that the radiation tolerance of XRPIX devices is governed by Dbox and that the BI type has higher radiation tolerance in our use as a focal plane sensor of an X-ray mirror. The readout noise is stable up to about 1 krad of Dbox, increases by about 10% at 10 krad, and rises up for further irradiation. If we employ an X-ray mirror with a half-power diameter of 10 arcsec and a focal length of 10 m, 10 krad of Dbox, a reasonable threshold of radiation tolerance in this experiment, indicates that XRPIX has a lifetime of more than three years which is typically required as a space-borne sensor.

Speaker: Koji Mori (University of Miyazaki)

17:50 → 18:00 Poster Student Award

PosterStudentAward.pdf

18:30 → 19:30 Busses: OIST to Rizzan

Friday 15 December

08:00 → 08:30 Busses: 8:00 Rizzan to OIST

08:40 → 10:20 Session15

Convener: Toru Tsuboyama (KEK, High Energy Accelerator Research Organization)

08:40 Performance evaluation of an SOI pixel sensor with in-pixel binary counters

Digital pickup is a critical issue to pixel detectors. SOI technology suffered much from it due to the capacitive coupling between sensing electrode and pixel circuit, insulated by a thin layer of SiO2. In order to tackle this issue, an advanced process called Double-SOI has been developed and many prototype chips have been submitted to this process. Among them, the design of CPIXTEG3b is dedicated to the study of the digital pickup issue. For this reason, a conventional architecture of single photon counting pixel is chosen and the in-pixel binary counter acts as an active source of pickup. The design optimization concerning Double-SOI and test results from single pixel have been summarized and presented in a separate publication. This talk will focus on the noise performance of the full matrix and detection efficiency measured on a synchrotron X-ray beam. The typical ENC is 52 e- and the sigma of threshold dispersion is 10 e- after threshold tuning. The detailed study of detection efficiency has demonstrated a homogeneous response to a flat field of illumination and revealed the impact of charge sharing at a pitch of 50 um. This work has verified the solution of digital pickup explicitly and led to the development of SOI pixel sensors of low noise and high resolution for X-ray imaging.

Speaker: Mr Longlong Song (Institute of High Energy Physics)

Performance evaluation of an SOI an SOI pixel sensor with in-pixel binary counters.pdf

Performance evaluation of an SOI an SOI pixel sensor with in-pixel binary counters.pptx

09:00 Development of new high-speed readout system for SOI pixel detectors

We are developing new high-speed readout system for Silicon-On-Insulator (SOI) Pixel Detectors. The SOI detector is a monolithic radiation imaging detector based on a 0.2um FD-SOI CMOS process. As before, we used Xilinx Virtex-4/5 FPGA readout board for SOI detector, and developed many facilities for this board. However, Virtex-4/5 FPGA is now obsoleted and does not have enough performance for recent experiments which require more than 1 kHz high-speed imaging with large number of pixels. Thus we started to develop new high-speed readout system using KC705. KC705 is the evaluation board which has Kintex-7, new generation FPGA. We develop new DAQ structure, compatible with previous environment, on this board and implement several functions for practical purpose. Although the achieved speed of the new system is still 100 Hz for 80k pixels, we are confident to reach readout speed of 1 kHz soon. The detail of new readout system will be shown in the presentation.

Speaker: Ryutaro Nishimura (The Graduate University for Advanced Studies (KEK))

Development of new high-speed readout system for SOI pixel detectors_v1.pdf

Development of new high-speed readout system for SOI pixel detectors_v1.pptx

09:20 Imaging Detector for Ultracold Neutrons using SOI Pixel Sensors and its Application to an Experimental Test of the Weak Equivalence Principle

The Weak Equivalence Principle (WEP) is one of the fundamental concepts of the theory of General Relativity. It has long been subjected to experimental tests, and possible anomalies are evaluated using the ratio of inertial and gravitational masses or the Eotvos parameter. However, most experimental tests have been performed in the classical regime and only few tests have been attempted in the quantum regime. In this talk, we propose an experimental test of the WEP in the quantum regime by simultaneously measuring the energy and length scales of gravitationally bound ultracold neutrons. We develop a time-resolving imaging device based on an event-driven SOI pixel sensor with a neutron converter layer. We will present the detailed design and characteristics of this detector.

Speaker: Yoshio Kamiya (University of Tokyo (JP))

SOIPIX2017_v0.pdf

09:40 Low background radiation SOI pixel detector for Solar Axion search experiment.

A solution to the strong CP problem was proposed by introducing a pseudoscalar particle, the Axion, in 1977. Both the experimental constraints and the theoretical predictions have been made by various approaches in Particle physics, Astrophysics and Cosmology so far.
We discuss configuration of the Solar Axion search experiment with a 57Fe foil, as an Axion-photon converter, sandwiched pixel detectors. The detector consists of SOI pixel sensor having a fine granularity and a good energy resolution with Event-driven mode, the peripheral circuit board and the radiation shield. In the experiment, low radiation background is the essential to maximize the sensitivity. We also discuss how to achieve the low radiation background detector with simulation and measurement.

Speaker: Yoshiyuki Onuki (University of Tokyo)

HSTD11SOIPIX17onuki_v1.pdf

10:00 Development of Debye-Ring Measurement System Using SOI Pixel Detector

In recent industrial sites of the fabricated metal product manufacturing, total inspection of residual stress or hardness in non-destructive non-contact is required. However, the conventional measurement system only used in a sampling inspection because it takes a long time to measure. Therefore, we are developing high speed Debye-ring measurement system using integration-type SOI pixel detector, INTPIX4 which can evaluate material characteristics for industrial use.
INTPIX4 is an X-ray imager with 832 x 512 pixels, each of pixel size 17 $\mu$m square. By using SEABAS2 readout board it is possible to measure Debye-rings up to 45 times for 1 second. The developed system is a compact and high speed Debye-ring measurement system thanks to two INTPIX4s and a compact high power X-ray tube.
In this presentation, we introduce the developed system and report its properties.

Speaker: Dr Shingo Mitsui (Kanazawa university)

HSTD11_mitsui_v1.pdf

10:20 → 10:50 Coffe/Tea break with Poster session: Removal of posters

10:50 → 12:30 Session16

Convener: Marek Idzik (AGH University of Science and Technology (PL))

10:50 Signal Clustering and Particle Tracking Using a Single Event-Driven SOI Pixel Detector for Axion Search Experiment

The current experiment aims to establish new limits on the axion mass for the hadronic window, using 57 Fe isotopes to search for an excess of solar axions at 14.4 keV. In order to improve the current limits, we make use of an X-ray SOI pixel detector; this device offers a fine granularity, a good energy resolution and a event-driven mode in the RoI (Region of Interest), besides the conventional frame readout mode (CCD-like). Since a reduction in the background levels from radioisotopes and cosmic-rays is required, we discuss the possibility of tracking and measuring the likelihood of the signal in being produced by different background particles, making use of the detector properties. In order to do this we develop a set of algorithms, and test their effectiveness on the first group of background data obtained with the XRPIX detector.

Speaker: Johnny Alejandro Mora Grimaldo (The University of Tokyo)

HSTD11 - Final.pdf

11:10 Synchrotron radiation X-ray experiments for a pulse-counting type SOI pixel for the soft X-ray measurements

Application of the Silicon-On-Insulator (SOI) technology [1] to a pixelated detector is expected for the imaging experiments using synchrotron X-rays. The SOI pixel detector is advantageous to make a fine pixel with a low noise, because there is no mechanical bump bonding. Because of the soft X-ray experiments like the surface X-ray scattering (SXS) and diffraction (SXRD) is very important for the surface analysis, we have started to develop a pulse-counting type SOI pixel which is sensitive to X-rays (E > 1 keV). The first test-element-group, CPIXPTEG2, is used for the evaluation experiment using synchrotron X-rays. The CPIXPTEG2 is designed applying the double-SOI technology [2] and its total thickness is made 75 μm for reducing the dispersion of the charges collected inside the sensor. To reduce the thickness of dead layer, the non-melting laser annealing was employed to suppress dopant diffusion during activation.
In this conference, we will introduce the results of the performance tests.

Speaker: Dr Ryo Hashimoto (KEK)

SOIPIX2017RyoHashimoto.pdf

SOIPIX2017RyoHashimoto.pptx

11:30 Plasmonic color filter for multispectral imaging from visible to near-infrared

We propose a new on-chip optical color filter of nanostructured metallic thin film for multispectral imaging based on surface plasmon resonance. This plasmonic color filter consists of periodic corrugated metallic nano-grating with sub-wavelength single aperture. Selected wavelength of incident light excites surface plasmon resonance by the concentric periodical corrugation on metal surface. The wavelength coupled with surface plasmons transmits through the sub-wavelength aperture with beaming light. The beaming light transmission has the advantage to suppress the spatial color cross-talk between pixels in the conventional image sensor. We calculated the transmission spectrum dependence of structural parameters such as corrugation period and groove depth by using the finite-difference time-domain algorithm, and designed periodic corrugated metallic thin film with filtering functionality in visible to near-infrared. Our structure is easily fabricated by the standard techniques of electron beam lithography, vacuum evaporation, and focus ion beam milling. Here, we demonstrated the transmission color selectivity from visible to near-infrared range of the fabricated metallic color filters. Integrating the proposed plasmonic color filters on image sensor device leads to simultaneous imaging of visible and near-infrared light, and it is expected to provide improved image recognition in vehicle mounted camera, security, and biological tissue engineering, and so on.

Speaker: Mr Atsutaka Miyamichi (Graduate School of Science and Technology, Shizuoka University)

SOIPIX2017_Miyamichi.pdf

11:50 Prototype of a 250 µm Pitch 36-Channel Silicon Photo Multiplier Array Using Silicon on Insulator Technology for Photon Counting Computed Tomography

Photon counting computed tomography (PCCT) based on indirect conversion detectors have taken great interests from its low fabrication cost and easy handling. Recent fine-pitch scintillator array also shows great potentials for spatial resolution enhancement. However, requirements for photo detector are still severe for precise energy and position measurement in PCCT.
In order to achieve both sensitivity and high spatial resolution in photo detector, 250 µm pitch Silicon photomultiplier array using Silicon on Insulator technology (SOI-SiPM) was provided in this study. SiPM, which is operated at over breakdown voltage, provides weak light detection capability with high S/N and fast response derived from internal gain. Back illumination capability of SOI contributes to avoid detection efficiency deterioration derived from quench resistor. As feasibility study, the first prototype of a 36-channel SOI-SiPM array was fabricated and characterized.

Speaker: Akihiro Koyama (University of Tokyo)

koyama_hstdSOI.pdf

12:10 Closing remarks

Speaker: Geoff Hall (Imperial College (GB))

Hall_HSDT11_close.pdf

Hall_HSDT11_close.pptx

13:30 → 17:30 Busses: OIST to Rizzan